Power reduction in delta-sigma modulator

Abstract

A high-order delta-sigma modulator is realized with amplifying / integrating circuits each having a small circuit scale, to thereby provide a small-size and low-power consumption delta-sigma modulator having a high precision. The delta-sigma modulator including the amplifying / integrating circuits connected in series in a plurality of stages has a delta-sigma modulator configuration in which one of adjacent amplifying / integrating circuits includes a delay integrating circuit and another thereof includes a non-delay integrating circuit. In an actual circuit, one amplifying circuit is operated in a time division manner to be shared between the adjacent amplifying / integrating circuits. The circuit scale is reduced in this way.

Description

RELATED APPLICATIONS[0001]This application claims priority under 35 U.S.C. §119 to Japanese Patent Application No. 2015-062833 filed on Mar. 25, 2015, the entire content of which is hereby incorporated by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to an over sampling analog-to-digital converter, and more particularly, to a high-order delta-sigma modulator.[0004]2. Description of the Related Art[0005]Analog-to-digital converters include Nyquist analog-to-digital converters and over sampling analog-to-digital converters. For measurement in a relatively narrow signal band, there has been used an over sampling analog-to-digital converter, a precision of which is easily increased and which as a small circuit scale. In particular, a delta-sigma modulator, which is a type of the over sampling analog-to-digital converter, has often been used.[0006]The analog-to-digital converter includes a delta-sigma modulator including: amplifyi...

AI Technical Summary

Benefits of technology

The present invention provides a delta-sigma modulator that can reduce its circuit size and power consumption. This is achieved by using delay integrating circuits and non-delay integrating circuits in two stages with one amplifying circuit. This reduces the circuit size and power consumption, making it a small and low-power consumption analog-to-digital converter. Additionally, the clock delay of the signal is reduced, improving the stability of the delta-sigma modulator.

Problems solved by technology

As the number of stages of the amplifying / integrating circuits is increased, the precision is improved and the circuit scale and the power consumption are increased.

The related-art delta-sigma modulator needs as many differential amplifiers as stages of the amplifying / integrating circuits, and hence it is difficult to reduce the circuit scale and the power consumption.

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