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Negative voltage generation circuit without low-dropout regulator

Active Publication Date: 2020-11-19
SAMSUNG ELECTRO MECHANICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent describes a negative voltage generation circuit that includes a clock generation circuit, a voltage control circuit, and a charge pump circuit. The circuit is designed to generate a negative voltage based on a power supply voltage and a detection voltage, and to stabilize the negative voltage using an output circuit. The technical effects of the invention include improved accuracy and efficiency in generating negative voltage, as well as improved stability and reliability of the generated voltage.

Problems solved by technology

The negative voltage (VNEG) may affect harmonic performance and breakdown of a switch.
In this case, a leakage current may be generated to deteriorate insertion loss performance.
However, since a BGR circuit and an LDO regulator occupy a relatively large area, they may hinder the miniaturization of the negative voltage generator.

Method used

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  • Negative voltage generation circuit without low-dropout regulator
  • Negative voltage generation circuit without low-dropout regulator
  • Negative voltage generation circuit without low-dropout regulator

Examples

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Embodiment Construction

[0045]The following detailed description is provided to assist the reader in gaining a comprehensive understanding of the methods, apparatuses, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatuses, and / or systems described herein will be apparent after an understanding of the disclosure of this application. For example, the sequences of operations described herein are merely examples, and are not limited to those set forth herein, but may be changed as will be apparent after an understanding of the disclosure of this application, with the exception of operations necessarily occurring in a certain order. Also, descriptions of features that are known may be omitted for increased clarity and conciseness.

[0046]The features described herein may be embodied in different forms, and are not to be construed as being limited to the examples described herein. Rather, the examples described herein have been provided merely to illu...

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PUM

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Abstract

A negative voltage generation circuit includes a clock generation circuit configured to generate a first clock signal, a first voltage control circuit configured to vary a first resistance value based on a magnitude of a power supply voltage and further configured to control a magnitude of a voltage in a first charge node, based on the varied first resistance value, and a first charge pump circuit configured to charge a voltage, controlled by the first voltage control circuit, in a charge mode, based on the first clock signal, and further configured to output a first voltage, generated by the charging, as a first negative voltage.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S)[0001]This application claims the benefit under 35 U.S.C. 119(a) of Korean Patent Application No. 10-2019-0057119 filed on May 15, 2019 in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes.BACKGROUND1. Field[0002]The present disclosure relates to a negative voltage generation circuit without a low-dropout (LDO) regulator.2. Description of Related Art[0003]Typically, a power amplifier module (PAM) may include a plurality of switches, a filter, and a power amplifier (PA) to support various frequency bands. For example, a signal, amplified by a PA, may be transmitted to an antenna through a band selection switch (BSSW), a filter, and an antenna switch module (ASM).[0004]The band selection switch (BSSW) and the antenna switch module (ASM) may include a radio-frequency (RF) switch to select a desired band.[0005]Typically, an RF switch may use a negative voltage VNEG (for ex...

Claims

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Application Information

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IPC IPC(8): H02M3/07
CPCH02M3/07H02M2003/071H02M3/071G05F3/08
Inventor JO, BYEONG HAKPAEK, HYUNKIM, JEONG HOONKIM, SOL ALIM, JONG MO
Owner SAMSUNG ELECTRO MECHANICS CO LTD