Structure and method for silicided metal gate transistors

Abstract

A structure and method are provided for fabricating a field effect transistor (FET) having a metal gate structure. A metal gate structure is formed in an opening within a dielectric region formerly occupied by a sacrificial gate. The metal gate structure includes a first layer contacting a gate dielectric formed over a semiconductor region of a substrate. The first layer includes a material selected from the group consisting of metals and metal compounds. The gate further includes a silicide formed over the first layer. The FET further includes a source region and a drain region formed on opposite sides of the gate, the source and drain regions being silicided after the first layer of the gate is formed.

Description

BACKGROUND OF INVENTION[0001]The invention relates to a semiconductor processing methods and structures, and more particularly to a structure and method for forming metal gates of transistors, especially for transistors in complementary metal oxide semiconductor (CMOS) technology.[0002]Polysilicon gate electrodes have been a preferred material for the manufacture of gate electrode because of the special characteristics of polysilicon, particularly thermal robustness and the greater patterning precision available for etching a polysilicon gate. Many fabrication steps, such as annealing processes, require extremely high processing temperatures and therefore it is important to have a polysilicon gate withstands high temperatures during the fabrication process. Polysilicon gates are capable of withstanding high temperature processing of other elements of transistors such as source and drain regions during dopant drive-ins. In addition, precise edges can be defined on polysilicon gates w...

AI Technical Summary

Benefits of technology

This method allows for the formation of transistors with improved metal gate structures and silicide layers that are resistant to high-temperature processing, maintaining accuracy and performance without interfering with other fabrication steps, thus overcoming the challenges of metal gate fabrication.

Problems solved by technology

Polysilicon is not a very good conductor of electricity, a quality which makes polysilicon transistors operate at slower speeds.

Furthermore, a polysilicon gate is subject to the formation of a depletion region in operation in which charge carriers are depleted from the gate material above the gate dielectric.

However, manufacturing of metal gates has been previously avoided because of difficulties in fabrication.

For one, metal gates are not as thermally robust as polysilicon, responding poorly to high temperatures during processing of transistors or other elements of integrated circuits (ICs).

In addition, metal gates cannot withstand the oxidation ambient present during some steps of gate fabrication such as gate sidewall spacer formation and / or gate sidewall oxidation.

Furthermore, patterning accuracy required in gate formation is reduced when performing photolithography or other similar techniques on metal surfaces.

Planar surfaces, which are a requirement for photolithographic patterning accuracy, are not easily obtainable in metals.

A major challenge in fabricating such transistors is to perform the implant and anneal (or dopant drive-in at high temperature) in a suitable order relative to other steps used to form the transistors.

Suicides of some metals, particularly cobalt and nickel, are intolerant of high temperature processing, thus adding to the difficulties in fabricating such transistors.

These and other difficulties of fabricating metal gates present challenges to be overcome.

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