Manufacturing method for a semiconductor device using a marker on an amorphous semiconductor film to selectively crystallize a region with a laser light

a manufacturing method and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device details, electrical devices, etc., can solve the problems of reducing the current transportation characteristics of carriers, reducing the position and the size of crystal grains to form tft, and increasing the off current in tft, etc., to achieve the effect of increasing the processing efficiency of substrates, increasing processing speed, and large crystallization area

Inactive Publication Date: 2005-12-27
SEMICON ENERGY LAB CO LTD
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  • Summary
  • Abstract
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  • Claims
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Benefits of technology

[0018]The present invention has been made in view the above and an object of the present invention is therefore to solve the above-mentioned problem and to achieve position control of a crystal grain in accordance with an arrangement of TFTs simultaneously with increase in a processing speed during a crystallization process. More specifically, an object of the present invention is to provide a manufacturing method for a semiconductor device, in which crystal having a large grain size can be continuously formed through super lateral growth that is artificially controlled and substrate processing efficiency during a laser crystallization process can be increased.
[0019]Further, another object of the present invention is to provide a manufacturing method for a semiconductor device, in which crystal having a large grain size can be continuously formed through super lateral growth that is artificially controlled and substrate processing efficiency during a laser crystallization process can be increased, and in addition, a simple laser irradiation method is adopted in which it is not required to incorporate in an optical system a mask used for processing a laser light into a slit-like shape on a substrate surface as in a conventional SLS method.
[0025]As described above, according to the present invention, instead of performing irradiation with the laser light scanned over the entire semiconductor film within a substrate surface, the laser light is scanned so as to crystallize at least an indispensable portion at minimum. That is, it is possible to dispense with a time period for applying the laser light to the portions removed at the time of the formation of the island-shaped semiconductor layers through patterning after crystallizing the semiconductor film. Thus, a time period required for the laser crystallization can be shortened and in addition, the processing speed of the substrate can be increased. The above structure is applied to the conventional SLS method, which becomes a means for solving a problem inherent to the conventional SLS method, in that substrate processing efficiency (throughput) is poor.
[0026]Further, according to the present invention, in addition to the method capable of reducing a time period required for the laser crystallization and of increasing the processing speed of the substrate, there is provided a simple method in which it is not required to incorporate in an optical system a mask used for processing a laser light into a slit-like shape on a substrate surface as in the conventional SLS method.
[0030]With the above structures, a manufacturing method for a semiconductor device can be provided, in which crystal grains having a large grain size can be continuously formed through super lateral growth that is artificially controlled and substrate processing efficiency during a laser crystallization process can be increased, and in addition, a simple laser irradiation method is adopted in which it is not required to incorporate in an optical system a mask used for processing a laser light into a slit-like shape on a substrate surface as in a conventional SLS method.

Problems solved by technology

Thus, it is impossible to designate the position and the size of the crystal grain to form the TFT.
It is known that this reduces current transportation characteristics of carriers due to an influence of a potential barrier in a recombination center or a trapping center of the carriers or in the grain boundary, which is caused by a crystal defect or the like, and causes an OFF current to increase in the TFT.
Also, since a range of the energy intensity region is extremely narrow, from a viewpoint of position control of the crystal grain, it is impossible to control positions where the crystal grains having a large grain size are obtained.
First, as a first problem, there can be cited poor substrate processing efficiency (throughput). As described above, in the SLS method, crystallization proceeds by a distance of about 1 μm per laser light shot. Therefore, it is necessary to make a relative movement distance (feeding pitch) of a beam spot of the laser light on a sample substrate equal to or less than 1 μm. According to the condition used for the general laser crystallization using the excimer laser of pulse oscillation, the feeding pitch per laser light shot is several tens of μm or more. Needless to say, however, the crystal peculiar to the SLS method cannot be manufactured under the above condition. The SLS method employs an XeCl excimer laser of pulse oscillation whose maximum oscillation frequency is 300 Hz. This only allows a crystallized region to be formed in such a manner that crystallization proceeds by a distance of about 300 μm at maximum per second with respect to a scanning direction of the laser light. With a processing speed at the above level, when the substrate size is enlarged, for example, to 600 mm×720 mm, a large amount of processing time per substrate is required in the conventional SLS method.
The fact that a large amount of processing time per substrate is required does not lead to only a problem in terms of time or cost.
Further, this may finally cause a variation in characteristics of a transistor in the substrate surface.
As a second problem, there can be cited the optical system that tends to be complicated in the conventional SLS method.
It is difficult to manufacture a slit-like mask resistant to such a high laser energy density.
As described above, the conventional SLS method involves the complicated optical system and a factor making device maintenance difficult to perform.

Method used

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  • Manufacturing method for a semiconductor device using a marker on an amorphous semiconductor film to selectively crystallize a region with a laser light
  • Manufacturing method for a semiconductor device using a marker on an amorphous semiconductor film to selectively crystallize a region with a laser light
  • Manufacturing method for a semiconductor device using a marker on an amorphous semiconductor film to selectively crystallize a region with a laser light

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Experimental program
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embodiment 1

[0071]In this embodiment, a description will be given of a manufacturing method for an active matrix substrate with reference to FIGS. 6A to 9. Here, a substrate on which a CMOS circuit, a driver circuit, and a pixel portion having a pixel TFT and a storage capacitor are all formed is called an active matrix substrate for the sake of convenience.

[0072]First, in this embodiment, a substrate 600 made of glass such as barium borosilicate glass or alumino borosilicate glass is used. Further, as the substrate 600, a quartz substrate or a silicon substrate, or a metal substrate or a stainless steel substrate whose surface is covered with an insulating film may be used. Alternatively, a plastic substrate having a heat resistance to a processing temperature of this embodiment may be used.

[0073]Subsequently, on the substrate 600, a base film 601 made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed using a known method (sputte...

embodiment 2

[0111]This embodiment shows an embodiment in a case of including a step of crystallizing a semiconductor film using a catalyst. Here, only a point different from Embodiment 1 will be shown. When a catalytic element is used, it is desirable to employ the techniques disclosed in JP 7-130652 A and JP 8-078329 A.

[0112]After being formed, the amorphous semiconductor film is subjected to solid phase crystallization using Ni. For example, when the technique disclosed in JP 7-130652 A is used, a nickel acetate solution containing 10 ppm of nickel in terms of weight is applied onto the amorphous semiconductor film to form a layer containing nickel. After a dehydrogenation step at 500° C. for 1 hour, heat treatment at 500 to 650° C. for 4 to 12 hours, for example, heat treatment at 550° C. for 8 hours is performed to achieve crystallization. Note that, as a usable catalytic element, the following elements may be used in addition to nickel (Ni), that is, germanium (Ge), iron (Fe), palladium (P...

embodiment 3

[0115]In this embodiment, an example of markers formed in a marker formation portion 423 will be shown. This embodiment can be implemented in combination with Embodiment 1 or 2.

[0116]FIG. 12A is a top view showing the markers of this embodiment. Reference numerals 421 and 422 denote markers formed in the semiconductor film as a reference (hereinafter, referred to as reference markers), which each have a rectangular shape. The reference markers 421 are arranged such that longer sides of the rectangle are disposed in a horizontal direction in all the markers. The respective reference markers 421 are arranged in a vertical direction at a regular interval. The reference markers 422 are arranged such that longer sides of the rectangle are disposed in a vertical direction in all the markers. The respective reference markers 422 are arranged in a horizontal direction at a regular interval.

[0117]The reference markers 421 are used as a reference for positioning the masks in the vertical dire...

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Abstract

Position control of a crystal grain in accordance with an arrangement of a TFT is achieved, and at the same time, a processing speed during a crystallization process is increased. More specifically, there is provided a manufacturing method for a semiconductor device, in which crystal having a large grain size can be continuously formed through super lateral growth that is artificially controlled and substrate processing efficiency during a laser crystallization process can be increased. In the manufacturing method for a semiconductor device, instead of performing laser irradiation on an entire semiconductor film within a substrate surface, a marker as a reference for positioning is formed so as to crystallize at least an indispensable portion at minimum. Thus, a time period required for laser crystallization can be reduced to make it possible to increase a processing speed for a substrate. The above structure is applied to a conventional SLS method, so that it is possible to solve a problem inherent to the conventional SLS method, in that the substrate processing efficiency is poor.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a manufacturing method for a semiconductor device having a thin film transistor, and particularly to a technique of forming a crystalline semiconductor film used for forming an active layer of the thin film transistor.[0003]2. Description of the Related Art[0004]As an example of a method of forming the active layer of the thin film transistor (hereinafter, referred to as TFT), there has been developed a technique of forming an amorphous semiconductor film on a substrate having an insulating surface to crystallize the film through a laser annealing method, a thermal annealing method, or the like.[0005]The laser annealing method is known as a crystallization technique which makes it possible to apply a high energy only to the amorphous semiconductor film to crystallize the film without significantly increasing a temperature of a glass substrate. In particular, an excimer laser oscillating ...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H01L29/786H01L21/20H01L21/77H01L21/84H01L23/544H01L29/04
CPCH01L21/2026H01L23/544H01L29/04H01L27/1285H01L2223/54453H01L2924/0002H01L2924/00H01L21/02422H01L21/02488H01L21/02502H01L21/0242H01L21/02672H01L21/02425H01L21/02686H01L21/02532H01L21/02595H01L21/02381H01L21/0268H01L21/02691H01L29/786
Inventor YAMAZAKI, SHUNPEISHIMOMURA, AKIHISAOHTANI, HISASHIHIROKI, MASAAKITANAKA, KOICHIROSHIGA, AIKOAKIBA, MAIKASAHARA, KENJI
Owner SEMICON ENERGY LAB CO LTD
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