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Method for manufacturing dies formed with a dielectric layer

a technology of dielectric layer and manufacturing method, which is applied in the direction of semiconductor devices, electrical equipment, basic electric elements, etc., can solve the problems of unavoidable dimension shrinkage due to curing, high cost of solid films, and easy contamination of wafers, so as to reduce the cost

Active Publication Date: 2011-07-26
POWERTECH TECHNOLOGY INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides a method of manufacturing dies with a dielectric layer that addresses contamination and warping issues during the manufacturing process. The method involves preforming the dielectric layer on a dicing tape and then attaching the wafer, reducing the number of wafer turning steps and improving yield with lower cost. Additionally, the method allows for easy and better processing by addressing wafer damages and alignment issues during the dicing process. The dielectric layer can also be used as a die-attaching paste or encapsulant for wafer level packaging, reducing costs.

Problems solved by technology

However, solid films are more expensive.
Therefore, it is more common to dispose liquid pastes on a wafer such as stencil printing on the back surface of a wafer, but the wafer is easily contaminated.
In step 5, since the dielectric layer is thermally cured, dimension shrinkage due to curing is unavoidable.
Moreover, the wafer is also under heating at the same time, and there is a thermal mismatching issue due to different thermal expansion coefficients and dimensions between the wafer and the dielectric layer.
Therefore, the wafer with the dielectric layer will experience multiple heating steps leading to serious wafer warpage issues due to mismatching of thermal expansion coefficients and dimensions, more the worse, the curing shrinkage of dielectric layer causing wafer handling difficulties in the following processes.
Furthermore, since the wafer has to go through multiple turning steps, the risk of lower yields and higher cost is relatively increased.

Method used

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  • Method for manufacturing dies formed with a dielectric layer
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  • Method for manufacturing dies formed with a dielectric layer

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Embodiment Construction

[0017]With reference to the attached drawings, the present invention is described by means of the embodiment(s) below where the attached drawings are simplified for illustration purposes only to illustrate the structures or methods of the present invention by describing the relationships between the components and assembly in the present invention. Therefore, the components shown in the figures are not expressed with the actual numbers, actual shapes, actual dimensions, nor with the actual ratio. Some of the dimensions or dimension ratios have been enlarged or simplified to provide a better illustration. The actual numbers, actual shapes, or actual dimension ratios can be selectively designed and disposed and the detail component layouts may be more complicated.

[0018]According to the first embodiment of the present invention, a method of manufacturing dies formed with a dielectric layer is illustrated in FIG. 2 for process flow block diagram and FIGS. 3A to 3G for the cross-sectiona...

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Abstract

A method of manufacturing dies formed with a dielectric layer is revealed. A liquid dielectric layer is formed on the dicing tape. The liquid dielectric layer is heated to be sticky. Then, a wafer is attached to the dielectric layer on the dicing tape. The wafer is diced into a plurality of dies on the dicing tape. The dies with attached portions of the dielectric layer are picked up to be peeled and separated from the dicing tape. The implementation of the dicing tape can be expanded to resolve various issues such as wafer contaminations, wafer warpage due to multiple heating and mismatching of thermal expansion coefficients, and wafer singulation problems due to alignment difficulties. The wafer handling steps can further be reduced to increase processing yield and to enhance easy and better processing.

Description

FIELD OF THE INVENTION[0001]The present invention relates to a method of manufacturing semiconductor devices by wafer dicing, and more particularly to a method of manufacturing dies formed with a dielectric layer.BACKGROUND OF THE INVENTION[0002]In semiconductor industries, the manufacture of semiconductor devices primarily divides into three stages: wafer fabrication, chip formation, and chip assembly. During wafer fabrication and chip formation processes, a dielectric layer is directly formed on a wafer for die attachment or for wafer-level packaging where the dielectric layer can be B-stage films, solid films or epoxy liquid pastes. However, solid films are more expensive. Therefore, it is more common to dispose liquid pastes on a wafer such as stencil printing on the back surface of a wafer, but the wafer is easily contaminated.[0003]FIG. 1 is the block diagram of a conventional process flow for manufacturing dies with a dielectric layer. Step 1 is to provide a wafer. Step 2 is ...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H01L21/00
CPCH01L21/78H01L2224/27013H01L2224/83191
Inventor HUANG, YU-CHIEH
Owner POWERTECH TECHNOLOGY INC