Static ram

Abstract

A static random access memory (SRAM) device including a substrate and an SRAM unit cell. The substrate includes an n-doped region interposing first and second p-doped regions. The SRAM unit cell includes: a first pass-gate transistor and a first pull-down transistor located at least partially over the first p-doped region; first and second pull-up transistors located at least partially over the n-doped region; and a second pass-gate transistor, a second pull-down transistor, and first and second read port transistors, all located at least partially over the second p-doped region. A boundary of the SRAM unit cell comprises first and second primary dimensions having an aspect ratio of at least about 3.2.

Description

technical field [0001] The present invention relates to a static random access memory (SRAM) device, in particular to a SRAM device with a high aspect ratio cell boundary. Background technique [0002] The actual size of a feature on a wafer is called feature size or line width. Reducing the feature size of a wafer allows more devices to be fabricated on the wafer and more devices per wafer, thus reducing the production cost per wafer or per wafer. Increasing the number of components on a chip also increases the performance of the chip because more components can be used to achieve a desired function. [0003] SRAM device is a kind of device that needs to reduce the feature size to reduce the production cost. SRAM is a type of random access memory that retains stored data bits therein as long as the power supply is not interrupted. Different from dynamic random access memory (DRAM for short), SRAM does not need to be refreshed periodically. The data access speed of SRAM ...

AI Technical Summary

Problems solved by technology

[0004] However, SRAM is more expensive than other types of memory

Images