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Source line driver

A technology of line driver and source signal, which is applied in the field of source signal line driver, and can solve problems such as large area

Active Publication Date: 2008-01-23
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the conventional source signal line driver, the stacked transistor architecture of the third circuit of the source signal line driver unit occupies a larger area in the memory

Method used

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Embodiment Construction

[0020] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, a preferred embodiment is specifically cited below, and in conjunction with the accompanying drawings, the detailed description is as follows:

[0021] FIG. 4 is a schematic diagram showing a flash memory device of the present invention. The flash memory device includes a memory cell array 20 , a word decoder 21 , a bit decoder 22 and a source signal line driver 23 . Multiple word lines WL2 0 to WL2 n-1 with bit line BL2 0 to BL2 m-1 Interleaved with each other to form the storage cell array 20 . The source signal line driver 23 controls the source signal line SL2 0 to SL2 n-1 , and each source signal line provides voltage to two columns of memory cells.

[0022] FIG. 5 is a diagram showing the structure of the source signal line driver of the present invention. The source signal line driver 23 has a plurality of source signal line dri...

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PUM

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Abstract

A source line driver for a flash memory includes a plurality of source driving units and a control circuit to drive a plurality of source lines. Each source line is coupled to memory cells in a row. Each source driving unit drives the corresponding source line and is coupled to the control circuit at a common node. The control circuit is coupled between the common node. The control circuit is coupled between the common node and a ground line. When any memory cell is assigned to execute a program operation, the control circuit isolates the common node and the ground. When the memory cells are not assigned to execute the program operation, the control circuit couples the common node to the ground line.

Description

technical field [0001] The present invention relates to a source signal line driving device, in particular to a source signal line driving device, which is suitable for a flash memory device and used to drive a source signal line, and the source signal line driving device occupies an smaller area. Background technique [0002] FIG. 1 shows the basic structure of a flash semiconductor memory device. The memory is composed of a plurality of storage units (Memory Cell) and other components, and the plurality of storage units 10 0，0 to 10 2n-1，m-1 They are arranged sequentially in an array to form a memory cell array (Memory Array) 10 . Each storage unit (as shown in the label "10 of Fig. 1 0，0 ") has a storage transistor, and the storage transistor is used to store a "1" level or a "0" level. In the memory cell array 10, the word line (Word line) WL1 0 to WL1 2n-1 It is used to enable the memory cells in the row (Row) direction. Word line decoder 11 receives the column a...

Claims

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Application Information

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IPC IPC(8): G11C16/06G11C7/00G11C16/04G11C16/10G11C16/24
CPCG11C16/24G11C16/10
Inventor 郭政雄
Owner TAIWAN SEMICON MFG CO LTD