Semiconductor device, circuit and method with synchronous input and output data

Abstract

Devices, circuits and methods synchronize the inputting and outputting of groups of data into a memory cell array and out of a device. Synchronizing is performed by internal clock signals, both of which are derived from a single delay feedback loop.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Priority Document No. P2002-01251 filed with the Korean Industrial Property Office on January 9, 2002, which is hereby incorporated by reference. technical field [0003] This invention relates to the field of semiconductor memory devices, and more particularly to circuits for controlling the clock delay or phase of input and output data into and out of the memory device. Background technique [0004] Semiconductor devices, especially memory devices, are used to store data. Data bits are stored by entering ("writing") the data bits into one or more arrays of memory cells. It is then output ("read") from that memory cell. [0005] Writes and reads data to and from the array of memory cells in the sync bit group. Sometimes such a set of data forms one byte. [0006] Synchronization of these operations is accomplished by using a single clock signal throughout the device. A...

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Problems solved by technology

Device 100 requires a relatively large area due to the inclusion of two feedback loops with replicated circuits

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