Method for producing MOS transistor with shallow-source electrode/drain electrode junction region
A technology of MOS transistors and junction regions, which is applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., and can solve problems such as difficulty in increasing dopant doping concentration and low resistance in solid-phase diffusion sources
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[0016] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention can be changed into other forms, and the scope of the present invention is not limited by the embodiments. Rather, the examples are provided in order to more fully explain the present invention to those skilled in the art. In the drawings, the thickness of layers or regions are exaggerated for clarity. Like reference numerals in the figures denote like components. Also, when it is written that a layer is formed "on" another layer or substrate, the layer may be formed directly on the other layer or the substrate, or other layers may be interposed therebetween.
[0017] Figures 1 to 6 is a cross-sectional view illustrating a method of manufacturing a MOS transistor having a shallow source / drain junction region according to a first embodiment of the present invention. refer to figure 1 A field oxi...
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