Method for producing a planar spacer, an associated bipolar transistor and an associated BiCMOS circuit arrangement

Abstract

Method for producing a planar spacer, an associated bipolar transistor and an associated BiCMOS circuit arrangement. The invention relates to a method for production of a planar spacer, of an associated bipolar transistor and of an associated BiCMOS circuit arrangement, in which first and second spacer layers are formed after the formation of a sacrificial mask on a mount substrate. A first anisotropic etching process of the second spacer layer is carried out to produce auxiliary spacers. A second anisotropic etching step is then carried out, in order to produce the planar spacers, using the auxiliary spacers as an etch mask.

Description

technical field [0001] The present invention relates to a method of fabricating a planar spacer, to an associated bipolar transistor and to an associated BiCMOS circuit arrangement, and more particularly to a method of fabricating self-regulating single-multiple bipolar transistors with improved electrical characteristics in BiCMOS circuits. Background technique [0002] In bipolar transistors, in order to obtain a high cut-off frequency and reduce radio frequency noise, it must be kept in contact with and connected to the intrinsic base with the lowest possible resistance. This is particularly advantageous with a base connection as short as possible, preferably self-adjusting, and with low resistance. [0003] In the case of so-called "single-multiple bipolar transistors", this base connection region is usually defined photolithographically, that is to say not in a self-regulating manner. For example, photolithographically defined emitter pillar blocks are used as implante...

AI Technical Summary

Problems solved by technology

Since the result of this process is not self-adjusting, all fluctuations and tolerances of photolithography are included

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