Method for forming device isolation region

Abstract

The invention relates to a method for forming a part isolating zone, firstly an oxidizing lining layer and a first silicon nitride layer are formed in turn on a silicon underlay, the oxidizing lining layer, the first silicon nitride and the silicon underlay are etched to form a groove, an insulating oxidizing layer is formed on the first silicon nitride layer, the insulating oxidizing layer can be filled fully in the groove; a second silicon nitride layer is formed on the insulating oxidizing layer, the second silicon nitride layer, the insulating oxidizing layer and the first silicon nitride layer are rubbed to remove the first silicon nitride layer and the oxidizing lining layer and form a shallow groove isolating structure. After the steps are finished, and because one silicon nitride layer is deposited on a silicon oxide layer, when the silicon oxide layer and the silicon nitride layer are rubbed, the speed for rubbing the silicon nitride is slower than that for rubbing the silicon oxide, thereby the depressed condition of the silicon oxide in the shallow groove can be improved after the rubbing process is over.

Description

technical field [0001] The invention relates to a method for forming device isolation regions, in particular to a manufacturing method for shallow trench isolation semiconductor devices. Background technique [0002] As the size of integrated circuits decreases, the devices that make up the circuits must be placed more densely to fit the limited space available on the chip. Since current research is devoted to increasing the density of active devices per unit area of ​​a semiconductor substrate, effective insulating isolation between circuits becomes more important. The methods for forming isolation regions in the prior art mainly include local oxidation isolation (LOCOS) process or shallow trench isolation (STI) process. The LOCOS process is to deposit a layer of silicon nitride on the surface of the wafer, and then perform etching to oxidize and grow silicon oxide in part of the recessed area, and the active device is generated in the area determined by the silicon nitrid...

AI Technical Summary

Problems solved by technology

However, the peripheral circuit area is a non-dense area of ​​active devices, and the width of some shallow trenches is greater than 20um. After grinding the insulating oxide layer in shallow trenches of this width, serious depressions will occur, resulting in leakage currents, and further in subsequent processes. Generate polysilicon residues and cause short circuits between active devices

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