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Data converting apparatus and data converting method

A data conversion and data technology, which is applied in security communication devices, electrical digital data processing, encoding/decoding devices, etc., can solve problems such as circuit enlargement and different operation delays.

Inactive Publication Date: 2007-09-26
MITSUBISHI ELECTRIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In the conventional encryption device and decryption device as described above, a mask must be newly generated, and a circuit for generating the mask is required, which leads to an increase in circuit size.
In addition, calculations are performed by parallel processing in units of blocks. Therefore, if the block length becomes longer, the number of calculation elements used at the same time will increase, and more power will be required. As a result, there will be problems such as easier power analysis.
Furthermore, when the block length is long, the calculation delay for each bit in each block is different, and there is a problem that power analysis becomes easier due to this delay.

Method used

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  • Data converting apparatus and data converting method

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Embodiment approach 1

[0106] As mentioned above, simple arithmetic elements such as XOR, table processing, and permutation are combined to form a block encryption algorithm. In the present embodiment, such calculations are implemented using elements with 1-bit output. However, this embodiment is applicable not only to block encryption algorithms but also to other encryption algorithms and the like.

[0107] FIG. 6 is a diagram showing a basic form of a data conversion algorithm according to this embodiment, and FIG. 7 is a diagram showing an example of the configuration of a data conversion device according to this embodiment.

[0108] 6 and 7 show a part of the encryption algorithm, and the algorithm in FIG. 6 is a basic form. That is, a parallel operation is performed on the XOR of the 32-bit key and the 32-bit input data to obtain 32-bit output data. In this figure, a key of 32 bits is stored in a key register 102 and input data of 32 bits is stored in an input register 101 . The XOR of the 3...

Embodiment approach 2

[0130] FIG. 9 is a diagram showing a basic form of a data conversion algorithm according to this embodiment, and FIG. 10 is a diagram showing an example of the configuration of a data conversion device according to this embodiment.

[0131] Figure 9 and Figure 10 show a part of the encryption algorithm, and the algorithm in Figure 9 is the basic form. That is, the parallel operation is performed on the "OR" of the 32-bit input data and the 32-bit key, and then the "OR" of the data obtained by this operation is performed in parallel with the other 32-bit keys, and the output is 32 bits The data. In this figure, the 32-bit input data is stored in the input register 108, the 32-bit key is stored in the first key register 109, and the other 32-bit key is stored in the second key register 111 . The exclusive OR of the 32-bit input data and the 32-bit key is calculated by the first parallel computing unit 110 , and the OR of the calculation result with other 32-bit keys is calcula...

Embodiment approach 3

[0147] In the implementation form of the first embodiment, a temporary register such as the temporary register 114 of FIG. 10 described in the second embodiment can be provided.

[0148] FIG. 12 is a diagram showing an example of the configuration of a data conversion device according to this embodiment.

[0149] In FIG. 12, the input data is stored in a 32-bit input shift register (first storage unit) 115, and the key is stored in a 32-bit first key shift register (second storage unit) 116 and a 32-bit first key shift register (second storage unit) 116. 2 key shift register (second storage unit) 118. The first serial arithmetic unit (calculation unit) 117 performs an exclusive-or operation on each of the key and one bit of the input data, and the second serial arithmetic unit (calculation unit) 119 performs an OR operation on each of the key and one bit of the input data. . The first selector (selection unit) 120 selects one of the first serial arithmetic unit 117 and the s...

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Abstract

For example, the power consumption amount of an operation related to data encoding or decoding is reduced so as to make the power analysis difficult. In a case of exclusive-OR operation of 32-bit input data and 32-bit key for obtaining 32-bit output data, the input data and key are held in a 32-bit input shift register (105) and a 32-bit key shift register (106), respectively, and one bit of each of the input data and key is input to a serial operational circuit (107), and an exclusive-OR one-bit is used and shifted to the left end of the input shift register (105). In the key shift register (106), a circular right shift is performed. This is performed 32 times, thereby terminating the 32-bit operation, with the result that the final result is held in the input shift register (105).

Description

technical field [0001] The present invention relates to a data conversion device and a data conversion method. Background technique [0002] In the encryption device and decryption device of Patent Document 1 (JP-A-2000-66585 (pages 7-13, Fig. 4)), data is kept secret by mask a and mask b, and the encryption or decryption operation After removing the influence of these masks, the data without masks is obtained. By using the mask a and the mask b in this way, it is possible to prevent prediction of internal data and make interpretation by power analysis difficult. [0003] In the conventional encryption device and decryption device as described above, a new mask must be generated, and a circuit for generating the mask is required, which leads to an increase in the size of the circuit. In addition, calculations are performed by parallel processing in block units, so if the block length becomes longer, the number of calculation elements used at the same time will increase, re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09C1/00G06F7/00
CPCG06F7/00H04L9/0625H04L9/003G06F2207/7242
Inventor 佐藤恒夫山田敬喜
Owner MITSUBISHI ELECTRIC CORP
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