Semiconductor element and its manufacturing method

Abstract

The invention is a semiconductor component, comprising a substrate, a gate dielectric layer, a gate, a source / drain region, and a stress layer, where the gate dielectric layer is arranged on the substrate, the gate is arranged on the gate dielectric layer and the area of the top of the gate is more than that of the bottom; in addition, the source / drain region is arranged in the substrate on two sides of the gate, and the stress layer is arranged on the substrate and covers the gate and the source / drain region.

Description

technical field [0001] The present invention relates to a semiconductor element and a manufacturing method thereof, in particular to a semiconductor element and a manufacturing method thereof which can improve operating performance through local mechanical stress control. Background technique [0002] In semiconductor elements, high-speed operation and low power consumption are often achieved by reducing the size of the element. However, with the continuous improvement of component integration, the current miniaturization of component size is approaching the limit. It is necessary to develop other methods of reducing component size to achieve the purpose of high-speed operation and low power consumption. [0003] Therefore, in the prior art, a method of controlling the stress of the channel region of the semiconductor transistor is proposed to solve the problem that the miniaturization of the element size is approaching the limit. This method uses stress to change the latti...

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Problems solved by technology

[0006] Although the above-mentioned local mechanical stress control method is simple to operate, it is limited to improve the stress of the channel region at present.

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