PLL device and current compensation method
A phase-locked loop and current compensation technology, which is applied in the direction of electrical components, automatic power control, etc.
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[0030] image 3 It is a schematic diagram showing the architecture of a phase-locked loop (PLL) device with a current compensation circuit according to an embodiment of the present invention. The PFD unit 31 receives the reference clock signal REF_CLK and the feedback clock signal FBK_CLK and measures the phase difference and frequency difference between them to output phase difference signals UP and DN. The charge pump circuit 32 receives the phase difference signals UP and DN and converts them into currents to charge the loop filter 33 . The loop filter 33 includes a capacitor C31 coupled to the ground and the node N1, a resistor R1 coupled to the node N1, and a capacitor C32 coupled to the ground. In this embodiment, capacitors C31 and C32 are realized by transistors, and the current I 31 with I 32 represent the leakage currents of capacitors C31 and C32, respectively. The voltage controlled oscillator (voltage controlled oscillator, VCO) 34 is based on the control volt...
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