E/D NMOS reference voltage source with high electric power rejection ratio

A technology with high power supply rejection ratio and reference voltage source, applied in control/regulation systems, regulating electrical variables, instruments, etc. The structure is simple and reasonable, the effect of improving the power supply rejection ratio and simplifying the process

Inactive Publication Date: 2008-03-05
NO 24 RES INST OF CETC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But its disadvantages: First, the bias generated by M1 and M2 is greatly affected by the process, and it is difficult to adjust to the required value; second, the power supply rejection ratio of the reference voltage source (the power supply rejection ratio is an item of the reference voltage source important index) is not high, only about 60dB, not suitable for applications with high power supply rejection ratio, such as PDA, mobile phone, digital, MP3 and other handheld portable instruments

Method used

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  • E/D NMOS reference voltage source with high electric power rejection ratio
  • E/D NMOS reference voltage source with high electric power rejection ratio
  • E/D NMOS reference voltage source with high electric power rejection ratio

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Embodiment Construction

[0021] The specific implementation manners of the present invention are not limited to the following description, and are now further described in conjunction with the accompanying drawings.

[0022] The circuit diagram of the E / DNMOS reference voltage source embodied in the present invention is shown in FIG. 3 . It is composed of an E / DNMOS pre-reference source circuit and a reference source circuit. The specific structure, connection relationship and function relationship are the same as the content of the invention in this specification, and will not be repeated here. It works like this:

[0023] For ease of calculation, the depletion-type NMOS transistors N1, N2, N3, and N4 are regarded as an equivalent NMOS transistor N1 * , whose threshold voltage is N TD , the channel width is W N1 , the channel length is L N1 ;Similarly, the NMOS tube enhanced N5, N6, N7, N8 is regarded as an equivalent NMOS tube N2 * , whose threshold voltage is N T2 , the channel width is W N2...

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Abstract

The invention comprises: an E / D NMOS pre reference source circuit, whose output is used for providing power for the reference source circuit, comprising 4 depletion type NMOS tubes and 4 enhance type NMOS tubes; a reference source circuit comprising 4 depletion type NMOS tubs and 4 enhance type NMOS tube. The circuit based on the invention doesn't need triodes, resistors and capacitors any more. It improves the power-supply restraint ratio, and its power -supply restraint ratio can be above 75db.

Description

(1) Technical field [0001] The invention relates to an E / D NMOS reference voltage source, in particular to an E / D NMOS reference voltage source circuit with high power supply rejection ratio. Its direct application field is the power management circuit in the analog integrated circuit, especially the low dropout linear power supply. (2) Background technology [0002] The reference voltage source circuit is the core unit circuit of the analog integrated circuit, especially in the low-dropout linear power supply in the power management circuit, the reference voltage source determines the performance index of the low-dropout power supply. At present, there are many kinds of reference voltage sources, such as Zener reference source, bandgap reference source, bandgap reference source with second-order compensation, etc. There are few structures with E / D NMOS reference source. Figure 1 is a typical E / D NMOS reference structure (see literature: Gong Mingfu et al., "E / D NMOS Refere...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F3/24
Inventor 胡永贵张正璠朱冬梅许云余金锋王敬廖良
Owner NO 24 RES INST OF CETC
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