Oxide deposition method of shallow groove isolation region

A technology of shallow trench isolation and deposition method, which is applied in the field of oxide deposition in shallow trench isolation, can solve the problems of complex process, increase process steps, reduce stress and erosion of shallow trench isolation sidewall oxide layer, etc. Achieve the effects of enhancing reliability, reducing R&D costs, and enhancing adhesion
CN101197307AActive Publication Date: 2008-06-11SEMICON MFG INT (SHANGHAI) CORP +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SEMICON MFG INT (SHANGHAI) CORP
Publication Date
2008-06-11

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Abstract

An oxide deposition method of shallow groove isolation area comprises that: a groove is formed on a semiconductor substrate; a sidewall oxide layer is formed on the sidewall and the bottom of the groove; a first oxide layer is deposited on the sidewall oxide layer by low temperature process; the first oxide layer is etched to enlarge a second deposition opening; a second oxide layer is deposited on the first oxide layer. HDPCVD is applied to perform the deposition-etching-deposition technique and can achieve the oxide deposition in the shallow groove isolation area / film layer with no holes; through controlling the temperature of deposition reaction, the density of the deposited film layer can be reduced and further the shallow groove isolation area / film layer oxides with low stress can be achieved.
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Description

technical field

[0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to an oxide deposition method for shallow trench isolation regions. Background technique

[0002] As the integration level of integrated circuits increases, the size of isolation regions between active regions in semiconductor devices must continue to shrink. The traditional area oxidation method (LOCOS) used to isolate the active region has a bird's beak shape at the edge of the field oxide layer due to the oxidation at the edge of the active region, so that between the active regions in the semiconductor device Effective isolation length is limited. Since the above-mentioned disadvantages of the region oxidation method can be avoided, the shallow trench isolation (Shallow Trench Isolation, STI) process has been widely used in isolation between active regions in semiconductor devices in recent years.

[0003] In order to ensure the filling effect of STI, ...

Claims

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