Gated diode nonvolatile memory with diffusing block structure

Abstract

A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal and a diffusion barrier structure between the diode nodes. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.

Description

technical field [0001] The present invention relates to electrically programmable and erasable non-volatile memory (EEPROM), and more particularly, to a bias arrangement (bias arrangement) of a charge storage memory, which can read with high sensitivity in the charge storage structure of a memory cell. content. Background technique [0002] Electrically programmable and erasable non-volatile storage technologies commonly known as charge storage structures such as EEPROM and flash memory have been widely used. EEPROM and flash memory adopt a certain number of memory cell structures. As the size of integrated circuits shrinks day by day, it becomes more and more important to use the memory cell structure based on the charge trapping dielectric layer because of its advantages of being scalable and easy to manufacture. Various memory cell structures with charge trapping dielectric layers have been adopted in the industry, such as PHINES, SONOS, and the like. These memory cell...

AI Technical Summary

Problems solved by technology

This laterally separated structure is one of the reasons why the size of the non-volatile memory cannot be further reduced

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