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Package substrate and manufacturing method thereof

A technology for packaging substrates and manufacturing methods, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as increasing costs and material waste, and achieve the effects of improving efficiency, reducing packaging costs, and improving manufacturing efficiency

Active Publication Date: 2010-09-29
ASE SHANGHAI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this way, the waste of materials is caused, and the cost is relatively increased.

Method used

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  • Package substrate and manufacturing method thereof
  • Package substrate and manufacturing method thereof
  • Package substrate and manufacturing method thereof

Examples

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Embodiment Construction

[0021] Please also refer to image 3 and Figure 4A to Figure 4C , image 3 It is a flow chart of the manufacturing method of the packaging substrate according to the present invention. Figure 4A and Figure 4B respectively image 3 A schematic diagram of the first packaging substrate in step 31 and step 32. Figure 4C for image 3 Schematic diagram of the second substrate unit in step 33. First, in image 3 In step 31, a first packaging substrate 40 is provided, such as Figure 4A shown. The first packaging substrate 40 has a plurality of first substrate units 41 and at least one defective substrate unit 42 . In this embodiment, the first packaging substrate 40 has a plurality of defective substrate units 42 . These first substrate units 41 are, for example, Ball Grid Array (BGA) substrates, and are arranged on the first packaging substrate 40 in a matrix.

[0022] Next, proceed image 3 Step 32. Such as Figure 4B As shown, the defective substrate unit 42 is s...

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Abstract

The invention discloses a package substrate and a manufacturing method. The package substrate comprises a frame, a plurality of first substrate units and at least a second substrate unit. The frame is provided with at least an opening. The first substrate units and the frame are integrally formed. The second substrate unit is disposed in the opening, and the opening and the second substrate are provided with different shapes. The first substrate units and the second substrate unit are arranged on the package substrate in matrix form.

Description

technical field [0001] The present invention relates to a packaging substrate and a manufacturing method thereof, and in particular to a packaging substrate in which any substrate unit is a good substrate unit and a manufacturing method thereof. Background technique [0002] The continuous breakthrough and evolution of semiconductor technology has been applied to various electronic products, bringing people a lot of convenience in handling daily affairs. In the packaging structure of the semiconductor chip, the semiconductor chip electrically connects the internal microelectronic elements and circuits to the outside through structures such as bumps, lead frames, or wires. At the same time, the packaging structure of the semiconductor chip can also prevent the semiconductor chip from being bumped or damp. In addition, with the complexity of the circuit on the chip and the increase in the number of electrical external contacts, the semiconductor packaging structure has gradua...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/488H01L21/48
CPCH01L2224/32225H01L2224/48227H01L2224/73265H01L2924/15311
Inventor 唐和明李德章翁肇甫林千琪周哲雅赵兴华杨淞富苏高明
Owner ASE SHANGHAI