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Non-volatile memorizer process fluctuation control method

A technology of volatile memory and control method, which is applied in the direction of static memory, digital memory information, information storage, etc., and can solve problems such as unfavorable expansion of process fluctuation parameters, large RISC area, and rising chip cost

Inactive Publication Date: 2011-05-04
FUDAN UNIV
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  • Claims
  • Application Information

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Problems solved by technology

[0004] For the process fluctuation control of memory, literature [1] proposed the concept of on-chip sensor, that is, integrated temperature sensor, substrate noise detector, leakage current monitor, and timer used to control the on-chip power supply voltage on the memory chip. And the corresponding control logic, the advantage of this is to control the impact of process fluctuations on circuit performance within a certain range, the disadvantage is that the chip area and the number of pins are greatly increased, and this is not conducive to the expansion of new processes Volatility parameters, if you need to expand, you need a larger chip area and more pins
[0005] In order to overcome these shortcomings, the literature [2] proposes to control the process volatility by embedding a reduced instruction set central processing unit (RISC). , and the number of chip pins only needs to be increased by a few, but the disadvantage is that the embedded RISC area is relatively large, resulting in an increase in the cost of the chip, especially when the capacity of the memory is relatively small. can not be ignored

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Embodiment Construction

[0019] According to the method of the present invention, the steps of utilizing the test process of the novel non-volatile memory to realize the process fluctuation control of the write operation are as follows (such as figure 2 , taking n=8 as an example, but not limited to n=8):

[0020] (1). First, let BIST control=1, read / write=write and PVT control=0, and then perform a write operation on the storage array.

[0021] (2). Clear all R1~Rn to 0;

[0022] (3), judge whether address is in current module, if yes, enter step (4), otherwise enter step (12);

[0023] (4), use the first set of parameters to write, if the write is successful, then R1=R1+1, return to step (3), otherwise enter step (5);

[0024] (5), use the second group of parameters to write, if the write is successful, then R2=R2+1, return to step (3), otherwise enter step (6);

[0025] (6), use the third group of parameters to write, if the write is successful, then R3=R3+1, return to step (3), otherwise enter...

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Abstract

The invention provides a technical fluctuation control method of a novel no-volatilization memory, belonging to the super-large scale digital integrated circuit technique field. The method combines the technical fluctuation control of the novel no-volatilization memory with the testing so as to realize the control to the technical fluctuation of the novel no-volatilization memory by making use ofthe reading-writing of the testing process to memory arrays and a corresponding control circuit. Compared with the existing technical fluctuation control methods, the invention has the advantages that the memorizing chip areas are not added so as not to increase manufacturing cost at the same time when realizing the control to the technical fluctuation.

Description

technical field [0001] The invention belongs to the technical field of ultra-large-scale digital integrated circuits, and specifically relates to a test process of a new type of non-volatile memory to realize its process fluctuation control, and a corresponding control circuit generated therefrom. Background technique [0002] With the improvement of integrated circuit technology level and the development of design reuse (Design Reuse) technology, the functions integrated on a single chip are increasing, and SOC (System on Chip System on Chip) chips are emerging in large numbers. With the continuous development of SOC chips, the area of ​​the entire chip occupied by the memory is getting larger and larger, and it has become one of the most critical factors affecting the cost of the chip. [0003] According to whether the stored data will disappear after the power is cut off, the memory can generally be divided into volatile memory and non-volatile memory. At present, a typi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/02G11C7/04G11C29/12
Inventor 赵长虹林殷茵
Owner FUDAN UNIV
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