Arithmetic logic unit using asynchronous circuit to implement

Abstract

The invention relates to an arithmetic logic unit which is realized by adopting an asynchronous circuit. The arithmetic logic unit includes a functional unit which receives the calculation control command and input data of a transmitting end and implements the arithmetic logic calculation of the input data; a timelag evaluation unit which carries out timelag evaluation according to the type of the calculation control command and the detail input data received by the functional unit; a timelag matching unit which selects a calculation timelag matched with the functional unit; a handshake protocol unit which controls the transmitting end to generate a request signal simultaneously when the transmitting end transmits the input data to lead the input to be synchronous. The handshake protocol unit informs a receiving end to take out the output data of the functional unit after the calculation timelag and controls the receiving end to generate a reply signal to lead the output to be synchronous. The arithmetic logic unit of the invention has the characteristic of high property, overcomes the property loss of a synchronous circuit which can only realize the timelag of the worst situation; has the characteristic of low power consumption and saves the circuit area.

Description

technical field [0001] The invention relates to the field of microprocessing data paths, in particular to an arithmetic logic unit realized by an asynchronous circuit. Background technique [0002] The Arithmetic-Logic Unit (ALU) is the execution unit of the central processing unit (CPU), and is the core component of all central processing units. The main function of the ALU is to perform operations on binary data. ALU generally completes various arithmetic logic operation functions such as addition, subtraction, comparison, shift, and, or, and exclusive or in the processor. Due to the complexity of the computing circuit and the high frequency used by the ALU in the microprocessor, the ALU often becomes the bottleneck in improving the performance of the microprocessor. Therefore, we must pay full attention to the design of the ALU and strive for perfection. [0003] Integrated circuits can be divided into synchronous circuits and asynchronous circuits according to different...

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Problems solved by technology

Third, another issue related to clocks is the issue of clock skew

[0010] According to the different implementation styles of asynchronous circuits, some asynchronous circuit handshake signals use two-phase bundled data. Since the realization of two-phase bundled data requires the design of components that are sensitive to signal inversion, such as event control registers that are sensitive to signal inversion, the design Toggle-sensitive components are more complex than normal level-sensitive components

In addition, the conditional control logic in response to signal inversion in the two-phase bonded data circuit is also very complicated

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