Slew rate intensifier for dynamic CMOS operational amplifier

Abstract

The invention discloses a slew rate multiplier of a dynamic CMOS operational amplifier, the operational amplifier is provided with a positive phase input end, a negative phase input end, a positive phase output end and a negative phase output end, and the slew rate multiplier comprises: a comparing unit, which ascertains a first status signal and a second status signal according to a difference value of the voltage of the positive phase input end and the voltage of the negative phase input end, wherein, when the difference of the voltage of the positive phase input end and the voltage of the negative phase input end is more than the value of critical voltage, the first status signal is available, and when the difference of the voltage of the negative phase input end and the voltage of the positive phase input end is more than the value of critical voltage, the second status signal is available; and an execution unit, which receives the status signals, wherein, when receiving the available first status signal, the charging current to the positive phase output end and the discharging current to the negative phase output end are increased, and when receiving the available second status signal, the charging current to the negative phase output end and the discharging current to the positive phase output end are increased.

Description

technical field [0001] The invention relates to the design of a low power consumption operational amplifier in a low power supply voltage CMOS / BiCMOS analog integrated circuit, in particular to a slew rate increaser capable of increasing the slew rate of the operational amplifier. Background technique [0002] In many applications, the small-signal performance and slew performance of operational amplifiers have different requirements for their operating current values. For example in figure 1 In a high signal-to-noise ratio sigma-delta analog-to-digital converter modulator shown, the first-stage integrator has a 3pF sampling capacitor Cs, and the operational amplifier (Operational Amplifier) ​​is required to be able to transfer the maximum charge Q of the integrating capacitor Cc within 60ns is 3pFx1V. If you allocate 30ns to the slew settling time and 30ns to the linear small signal settling time, the slew performance requires 100uA unilateral output stage drive current I...

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Problems solved by technology

[0006] However, when the power supply voltage Vpow decreases as the process critical dimension shrinks, because the difference between Vip and Vins is close to the power supply voltage value, there is no voltage space to turn on the transistors Mni and Mpi, so the circuit is no longer effective

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