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Delay grade selective circuit and correlation method thereof

A technology for selecting circuits and delay stages, applied to electrical components, pulse processing, generating/distributing signals, etc., can solve problems such as system operation errors

Active Publication Date: 2009-06-10
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Ideally, after the required delay signal is determined, it can always meet the needs of the system and does not need to be changed. However, in practice, the delay amount of the delay signal will change with many factors, such as PVT (Process, Voltage, Temperature), etc., which often cause errors in system operation

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  • Delay grade selective circuit and correlation method thereof
  • Delay grade selective circuit and correlation method thereof
  • Delay grade selective circuit and correlation method thereof

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Embodiment Construction

[0031] Certain terms are used in the description and claims to refer to particular components. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. "Includes" mentioned throughout the specification and claims is an open term, so it should be interpreted as "including but not limited to". Otherwise, the term "coupled" includes any direct and indirect means of electrical connection. Therefore, if it is described that a first device is coupled to a second device, it means that the first device may be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.

[0032] FIG. 2 shows a delay stage selection circuit 200 according to an ...

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Abstract

The invention relates to a delay-level selecting circuit, which comprises a first register for generating a plurality of sampling values according to a clock signal and a delay clock signal; a first storage unit for storing the sampling values and outputting the sampling values according to a first selecting signal; a selecting unit for outputting the sampling values according to a second selecting signal; a judging module for judging whether two continuous sampling values accord with a specific relation, deciding the specific delay level if the two continuous sampling values accord with the specific relation, and deciding the specific delay level according to a first count value; a counter for generating the count value to control the delay clock signal sampled by the first register; a first selecting signal generating circuit for generating the first selecting signal according to the count value; and a second selecting signal generating circuit for generating the second selecting signal according to the count value.

Description

technical field [0001] The present invention relates to a delay level selection circuit and its related method, in particular to a delay level selection circuit and its related method for comparing delay signals of various levels with system clocks, recording the results and determining a better delay level according to the results. Background technique [0002] Delay circuits are often used in circuits to synchronize multiple clocks. Generally speaking, delay circuits can be classified into analog delay circuits and digital delay circuits. [0003] FIG. 1 shows a conventional analog delay circuit structure, which can be used to generate multiple delayed clocks with the same frequency but different phases according to an input clock CKIN. As shown in FIG. 1 , the delay circuit 100 includes: a phase detector (phase detector, PD) 102, a charge pump (chargepump) 104, a loop filter (loop filter) 106, and a delay line (delay line) 108. The control voltage V output by the loop f...

Claims

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Application Information

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IPC IPC(8): G06F1/10H03K5/13H03K5/135H03K5/14
Inventor 郭东政张名君
Owner REALTEK SEMICON CORP
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