A SPWM pulse rotation control method for cascade middle point clamping multi-level inverter

A technology of multi-level inverter and control method, which is applied in the direction of converting irreversible DC power input into AC power output, output power conversion device, electrical components, etc. Problems such as voltage balance, unbalanced voltage of two capacitors in series, increased hardware burden, etc., achieve easy motor vector control, reduce hardware burden, and achieve easy effects

Inactive Publication Date: 2009-08-12
BEIJING JIAOTONG UNIV
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Problems solved by technology

However, the existing technology does not consider the balance of the voltages of the two series capacitors in each inverter unit, resulting in an unbalanced voltage between the two series capacitors during operation, especially during low-frequency operation.
Moreover, in the prior art, multiple carriers are applied to cascaded neutral-point-clamped multilevel inverters for PWM modulation, which increases the burden on system hardware.

Method used

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  • A SPWM pulse rotation control method for cascade middle point clamping multi-level inverter
  • A SPWM pulse rotation control method for cascade middle point clamping multi-level inverter
  • A SPWM pulse rotation control method for cascade middle point clamping multi-level inverter

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Embodiment Construction

[0037] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments. The following introduction takes phase A and N=4 as an example, and the method is applicable to phases B and C.

[0038] (1) Define the control signals K1, K2, K3 of each inverter unit, and define 8 switch signals Sa1, Sa2, Sb1, Sb2, Sa1', Sa2', Sb1', Sb2' of each inverter unit. according to Figure 1b , to determine the relationship between the control signal of each inverter unit and the switch signal, output voltage and capacitor used, as shown in Table 1, 1 in the table means Figure 1b The corresponding switch tube in is turned off, 0 means Figure 1b The corresponding switch in the conduction, v c1 , v c2 respectively Figure 1b Medium capacitance C 1 and C 2 the terminal voltage.

[0039] (2) Define the control signals of the 4 inverter units of phase A as: the first group of signals A11 、A 12 、A 13 , the second set of signals A ...

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Abstract

The invention provides a SPWM pulse rotation control method for cascaded neutral-point clamped multilevel inverters, which belongs to the technical field of power electronic multilevel pulse-width modulation. The control method comprises the steps of adopting single-carrier modulation, calculating pulse duty cycle on the basis of formulae, transforming modulation result into a corresponding binary code, evenly applying each inversion unit and two series capacitors in each inversion unit through pulse coding and dynamic pulse rotation, balancing the voltage and power of each inversion unit, balancing the voltage of the two series capacitors in each inversion unit and realizing high pulse frequency of complex phase voltage through low switching frequency of each inversion unit. The control method does not need to add any extra hardware to the cascaded neutral-point clamped multilevel inverters, and a control plate can use one DSP chip and one CPLD chip, wherein the DSP produces the information of the binary code needed by SPWM modulation in the invention, and the CPLD completes pulse coding and pulse rotation. The control method has the advantages of implementation easiness and low system cost.

Description

technical field [0001] The invention relates to a SPWM pulse rotation control method for cascaded neutral-point clamped multilevel inverters, in particular to realize each inverter in cascaded neutral-point clamped multilevel inverters by using pulse coding and pulse rotation technology. The invention relates to the power and voltage balance of inverter units, and realizes the voltage balance of two series capacitors in each inverter unit, belonging to the technical field of multilevel pulse width modulation of power electronics. Background technique [0002] The cascaded neutral point clamped multilevel inverter has the advantages of the three-level inverter and the cascaded H-bridge inverter, and its structure is as follows Figure 1a and Figure 1b shown. Figure 1a In each phase branch, N inverter units are connected in series, and each inverter unit is composed of two three-level inverters connected in parallel. Figure 1b In the structure shown, each inverter unit can...

Claims

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Application Information

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IPC IPC(8): H02M7/487
CPCH02M7/49H02M7/487H02M7/5395
Inventor 葛宝明
Owner BEIJING JIAOTONG UNIV
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