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Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus

A manufacturing method and a technology for manufacturing devices, which are applied in semiconductor/solid-state device manufacturing, photolithographic process coating equipment, electrical components, etc., can solve difficult positioning, difficulty in achieving high-precision pattern formation, and increased manufacturing costs of semiconductor devices, etc. question

Inactive Publication Date: 2009-08-19
TOKYO ELECTRON LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, there are problems in that the process becomes complicated, the manufacturing cost of the semiconductor device increases, and it is difficult to perform high-precision positioning in the second exposure process relative to the first exposure process, and it is difficult to achieve high-precision pattern formation.

Method used

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  • Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus
  • Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus
  • Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus

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Experimental program
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Embodiment Construction

[0035] Embodiments of the present invention will be described below with reference to the drawings.

[0036] figure 1 It is a schematic enlarged view showing a part of a substrate according to an embodiment of the present invention and showing steps of this embodiment, figure 2 It is a flowchart showing the process of this embodiment. Such as figure 1 As shown, a plurality of layers such as a first layer 102 , a second layer 103 , and a third layer 104 made of different materials are formed on a substrate 101 . At least one of these layers (third layer 104) is a layer to be etched.

[0037] First, if figure 1 As shown in (a), the first pattern forming step ( figure 2 step 201), that is, on the third layer 104, the first pattern 105 composed of a photoresist patterned into a predetermined pattern is formed through the steps of coating, exposure, and development. As the photoresist (first mask material) for forming the first pattern 105, in order to form a finer pattern,...

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PUM

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Abstract

Provided is a pattern forming method for forming a pattern serving as a mask, which includes: a process for forming a first pattern 105 made of a photoresist; a process for forming a boundary layer 106 at sidewall portions and top portions of the first pattern 105; a process for forming a second mask material layer 107 to cover a surface of the boundary layer 106; a process for removing a part of the second mask material layer 107 to expose top portions of the boundary layer 106; a process for forming a second pattern made of the second mask material layer 107 by etching and removing the boundary layer 106; and a trimming process for reducing a width of the first pattern 105 and a width of the second pattern to predetermined widths.

Description

technical field [0001] The present invention relates to a patterning method for forming a mask used for etching such as plasma etching on a substrate such as a semiconductor wafer, a method for manufacturing a semiconductor device, and an apparatus for manufacturing the semiconductor device. Background technique [0002] Conventionally, in a manufacturing process of a semiconductor device or the like, an etching process such as plasma etching is performed on a substrate such as a semiconductor wafer to form a fine circuit pattern or the like. In such an etching process, a mask is formed by a photolithography process using a photoresist. [0003] In such a photolithography process, various techniques have been developed in order to cope with the miniaturization of the formed pattern. As one of them, there is a so-called double pattern exposure method. This double pattern exposure method is formed by carrying out the pattern formation of two stages of the following two steps...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/32H01L21/311H01L21/312H01L21/768H01L21/00G03F7/16
Inventor 八重樫英民志村悟
Owner TOKYO ELECTRON LTD