Phase-locked loop frequency synthesizer and method for regulating frequency of modulation signals

Abstract

The invention relates to a phase-locked loop frequency synthesizer and a method for regulating the frequency of modulation signals. The phase-locked loop frequency synthesizer comprises a phase-lockedloop circuit, a unit for regulating the frequency of the modulation signals, and a modulation processor, wherein the unit for regulating the frequency of the modulation signals is used for changing the frequency of output signals according to a frequency regulation factor of the unit for regulating the frequency of the modulation signals, and generating premodulation signals, wherein the frequency regulation factor is determined according to the frequency of the modulation signals; and the modulation processor is used for generating modulation signals according to the premodulation signals. The invention also provides a method for regulating the frequency of the modulation signals of the modulation processor of the phase-locked loop frequency synthesizer. The invention arranges the unit for regulating the frequency of the modulation signals inside the phase-locked loop frequency synthesizer with spread spectrum, changes the frequency of the output signals according to the frequency regulation factor of the unit for regulating the frequency of the modulation signals to generate the premodulation signals, generates the modulation signals according to the premodulation signals, and makes the frequency of the modulation signals meet the requirements by changing the frequency regulation factor of the unit for regulating the frequency of the modulation signals when the frequency ofthe modulation signals is required to be within certain range.

Description

Technical field [0001] The invention relates to a phase-locked loop frequency synthesis technology, in particular to a phase-locked loop frequency synthesizer and a method for adjusting the frequency of a modulation signal. Background technique [0002] Phase locked loop (PLL, Phase Locked Loop) is widely used in system-on-chip (SOC, Systemon Chip) to form a frequency synthesizer, clock generator, etc. figure 1 It is a basic structure of a phase-locked loop, including: Phase Frequency Detector (PFD, Phase Frequency Detector) 10, Charge Pump (CP, Charge Pump) 11, Loop Filter (LP, Loop Filter) 12, Voltage Control An oscillator (VCO, Voltage Control Oscillator) 13 and a divider (Divider) 14, and the loop filter 12 includes a resistor Rp and a capacitor Cp connected in series. [0003] Frequency discriminator 10 detects the input signal S ref And feedback signal S fb The frequency difference and the phase difference of the phase detection signal UP and DN are generated and sent to th...

AI Technical Summary

Problems solved by technology

According to the above formula (1), it can be seen that for the input signal S ref frequency f ref There is a big limitation, that is, for the waveform generator 106 that has been produced, only by changing the input signal S ref frequency f ref To change the frequency f of the modulation signal of the waveform generator 106 mod

In practical applications, the input signal S ref frequency f ref It is generated by a crystal oscillator, and it is time-consuming and laborious to change its frequency, and it is impossible to change it in many occasions

The waveform generator 106 designed in this way is likely to be mod If it does not meet the standard such as SATA standard, it will be eliminated, resulting in product waste

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