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Low power consumption folded interpolating analog-to-digital converter for sharing sub-converters

An analog-to-digital converter, folding and interpolation technology, applied in the direction of analog-to-digital converter, analog/digital conversion, code conversion, etc., can solve the problems of multiple hardware overhead and power consumption, and achieve power saving and hardware overhead saving , The effect of low circuit power consumption

Inactive Publication Date: 2010-03-03
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method can effectively suppress the quantization error of coarse sub-converter and fine sub-converter, but it comes at the cost of more hardware overhead and power consumption

Method used

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  • Low power consumption folded interpolating analog-to-digital converter for sharing sub-converters
  • Low power consumption folded interpolating analog-to-digital converter for sharing sub-converters
  • Low power consumption folded interpolating analog-to-digital converter for sharing sub-converters

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Embodiment Construction

[0027] Further describe the present invention below in conjunction with accompanying drawing.

[0028] Figure 5 It shows the folded interpolation analog-to-digital converter shared by the sub-converters proposed by the present invention, which consists of a track and hold circuit 50, a reference voltage resistor string 51, a pre-amplification circuit 52, an N-level cascaded folding circuit 53, an interpolation circuit 54, a comparison device 55 and encoding circuit 56. Its working principle is:

[0029] (1) The analog input signal passes through the track and hold circuit 50 to obtain a hold signal.

[0030] (2) The reference level produced by the holding signal and the reference voltage resistor string 51 is used as the input signal of the pre-amplification circuit 52, and the output of the pre-amplification circuit is a differential amplification signal between the holding signal and the reference level, and the output of the pre-amplification circuit The signal is the i...

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Abstract

The invention belongs to the integrated circuit technical field, and particularly relates to a low power consumption folded interpolating analog-to-digital converter for sharing sub-converters. The analog-to-digital converter is composed of a track and hold circuit, a reference voltage resistor string, a pre-enlarging circuit, N-grade (N is more than 1) cascade folded circuit, an interpolating circuit, a comparator and a coding circuit. In the invention, according to a part of output of the pre-enlarging circuit and the first N-1-grade folded circuit quantitative information originally provided by a crude converter can be obtained, thus saving power consumption of crude analog pre-processing circuit; and meanwhile all the quantitative results are generated on the same signal channel, thusinhibiting quantitative error between a fine converter and a crude converter. The converter has saved hardware expense and low circuit power consumption.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a low-power-consumption folding and interpolating analog-to-digital converter for suppressing quantization errors between sub-converters of the folding and interpolating analog-to-digital converter. Background technique [0002] A schematic diagram of a commonly used folded interpolation analog-to-digital converter is shown in figure 1 As shown, it is mainly composed of a tracking and holding circuit 10, a reference voltage resistor string 11, a coarse sub-converter 12, a fine sub-converter 13 and an encoding circuit 14, wherein the coarse sub-converter is composed of a coarse sub-preamplification circuit 120 and a coarse sub-comparator The micro converter is composed of a micro preamplifier circuit 130 , a folding circuit 131 , an interpolation circuit 132 and a micro comparator 133 . For an N-bit folded interpolation ADC, figure 2 is a schematic diagr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/12H03M1/34
Inventor 任俊彦林俪陆焱王明硕
Owner FUDAN UNIV
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