System and method for processing jump instruction of microprocessor in branch prediction way

A technology of jump instruction and branch prediction, applied in concurrent instruction execution, machine execution device and other directions, can solve the problems of complex and unsuitable branch prediction method, and achieve the effect of simple branch prediction method

Active Publication Date: 2010-07-07
LOONGSON TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] Since jump instructions cannot be used as delay slot instructions, any other type of instruction can be used as a delay slot instruction, so positioning the delay slot instruction and deciding whether to cancel the delay slot instruction according to the jump instruction co...

Method used

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  • System and method for processing jump instruction of microprocessor in branch prediction way
  • System and method for processing jump instruction of microprocessor in branch prediction way
  • System and method for processing jump instruction of microprocessor in branch prediction way

Examples

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example 1

[0073] Example 1. In this example, there are 8 items in the operation queue, that is, 8 instructions can be executed in the pipeline at the same time. It is assumed that there are already three instructions in the operation queue, and the queue head pointer points to the second instruction. First, the decoding module decodes the instructions fetched by the instruction fetching module; in order to speed up branch prediction, pre-decode these instructions while decoding, and then perform branch prediction according to the pre-decoding results. After pre-decoding, it is found that the first instruction is a branch likely instruction, so it is predicted to jump, and the jump execution flag (blikely flag) of the decoding bus is set to 1; the second instruction is The delay slot instruction for this instruction. Then these two instructions are sent to the operation queue. Among them, the first instruction is written into the fourth item of the operation queue, and the blikely flag...

example 2

[0077]Example 2. In this example, there are 8 items in the operation queue, that is, 8 instructions can be executed in the pipeline at the same time. It is assumed that there are already three instructions in the operation queue, and the queue head pointer points to the second instruction. First, the decoding module decodes the instructions fetched by the instruction fetching module; in order to speed up branch prediction, pre-decode these instructions while decoding, and then perform branch prediction according to the pre-decoding results. After pre-decoding, it is found that the first instruction is an ordinary jump instruction, and whether it jumps is predicted according to the branch predictor. And set the blikely flag of the decoding bus to 0; the second instruction is the delay slot instruction of this instruction. Then these two instructions are sent to the operation queue. The first instruction is written into the fourth item of the operation queue, and the blikely f...

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Abstract

The invention discloses a system and a method for processing a jump instruction of a microprocessor in a branch prediction way. The system comprises a coding module and a transmission module, wherein the coding module comprises a branch predictor used for predicting by adopting a static prediction method when the jump instruction to be processed is in the jump execution type or adopting a dynamicprediction method when the jump instruction to be processed is not in the jump execution type after the coding module judges that an instruction to be processed is the jump instruction and judges thetype of the jump instruction through precoding, and directly writing the jump instruction to be processed and a delay slot instruction thereof in an operational queue in a sequence of the instructions in a program; and the transmission module comprises a prediction result processor used for canceling the instruction executed by error and continue fetching in a correct jump direction when the branch predictor predicts the jump instruction by error after the jump instruction is executed and written back to the transmission module. The system cancels operation by adopting different cancellation methods on the basis that whether the instruction is the jump execution instruction or not when the instruction is cancelled.

Description

technical field [0001] The invention relates to the field of microprocessor architecture, in particular to a microprocessor jump instruction branch prediction processing system and method. Background technique [0002] In the existing microprocessor system, the jump instruction brings many challenges to the design of the microprocessor. For example, for a microprocessor with a pipeline structure, when the microprocessor is executing a program with a jump instruction, if it encounters a jump instruction, it is possible to determine whether the jump instruction jumps and the address of the jump target at the earliest. The pipeline stage is a decoding stage, such as a direct jump (jump) instruction. [0003] However, for most jump instructions, the jump direction and jump target address of the jump instruction cannot be determined until the execution stage is completed. At this time, the subsequent instructions may have been fetched from the memory, and what is more, they hav...

Claims

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Application Information

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IPC IPC(8): G06F9/38
Inventor 李祖松徐翠萍郝守青汪文祥
Owner LOONGSON TECH CORP
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