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Forming method for MOS device for ESD protection

A MOS device and device technology, applied in the field of MOS device formation, can solve the problem that the resistance value of the ballast resistance cannot be further increased, and achieve the effects of reducing the size, reducing the interval, and reducing the cost

Inactive Publication Date: 2010-07-07
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as a result, the resistance value of the ballast resistor is completely determined by the ion implantation concentration and depth of the source / drain region of the MOS device, which makes it impossible to further increase the resistance value of the ballast resistor

Method used

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  • Forming method for MOS device for ESD protection
  • Forming method for MOS device for ESD protection
  • Forming method for MOS device for ESD protection

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Embodiment Construction

[0016] In order to make the purpose and features of the present invention more comprehensible, the specific implementation manners of the present invention will be further described below in conjunction with the accompanying drawings.

[0017] The core idea of ​​the present invention is to carry out reverse implantation to the region forming the ballast resistance of the MOS device through the ion implantation process of the source / drain region of another MOS device whose type is opposite to the MOS device.

[0018] In the present invention, a MOS device for ESD protection and another MOS device of the opposite type are formed on the same substrate. Specifically, the MOS device may be an NMOS device, while the other MOS device is a PMOS device. Please refer to the Figure 4 and Figure 5 , Figure 4 and Figure 5 The ion implantation processes of the source / drain regions of the NMOS device and the PMOS device used for ESD protection in the method according to the present i...

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Abstract

The invention discloses a forming method for a MOS device for ESD protection, which comprises: using an ion implantation technology of the source / drain region of the other MOS device the type of which is contrary to that of the MOS device to reversely implant the region of steady resistance forming the MOS device, thus reducing the iron implanting concentration of the region, and further increasing the resistivity of the steady resistance of the MOS device without increasing the technical steps. And in addition, since the resistivity of the steady resistance is increased, when needing the MOS device with the same ESD protection performance, the interval between the drain region and grid electrode can be reduced, thereby reducing the size of the MOS device, and lowering the cost.

Description

technical field [0001] The invention relates to the technical field of silicon semiconductor devices, in particular to a method for forming a MOS device used for ESD protection. Background technique [0002] During the manufacturing process and final system application process, an electrostatic discharge (Electrostatics Discharge, ESD) phenomenon may occur in the integrated circuit. ESD phenomena typically cause the discharge of high voltage potentials (typically thousands of volts) resulting in short-term (typically 100 ns) high current (several amps) pulses, which can destroy fragile devices present in current integrated circuits, resulting in functional failure of the system. Therefore, ESD protection is essential for integrated circuits. [0003] MOS device is an important ESD protection device, which is widely used for ESD protection of I / O ports of integrated circuits. When MOS devices are used for ESD protection, the avalanche breakdown characteristics of MOS device...

Claims

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Application Information

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IPC IPC(8): H01L21/8234H01L21/266H01L23/60
Inventor 俞柳江王全曹永峰周伟顾学强肖慧敏陈立山
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT