Rapid vehicle lane line detection device based on parallel processing
A lane line detection and parallel processing technology, applied in the direction of processor architecture/configuration, can solve problems such as limited speed
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[0073] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the following further describes the present invention in detail in conjunction with specific embodiments and with reference to the accompanying drawings.
[0074] Such as figure 1 Shown is the system architecture diagram of a fast lane line detection device based on parallel processing, which includes a two-dimensional fully parallel array processor 10 and an array controller 101, and two reduced instruction set processor (RISC) subsystems 11 and 13 , The arbiter 14 for bus switching and two multiplexers 12 and 15, lane line image input and detection result output module. Under the effect of a fast lane line detection algorithm suitable for parallel implementation, the large-scale parallel operation of the fully parallel array processor is used to achieve fast lane line image preprocessing, and then two RISC subsystems are used according to the preprocessing results. The ...
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