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Hardware synchronous circuit structure suitable for multiprocessor system and implement method thereof

A multi-processor system and synchronous circuit technology, applied in the direction of electrical digital data processing, instruments, digital computer components, etc., can solve the problem of increasing the complexity of software development, the inability to accurately locate the program execution status, and the different response speeds of processor interrupts etc. to achieve flexible parallel task division and scheduling, simplified design complexity, and simple structure

Active Publication Date: 2010-09-22
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

However, different processors have different interrupt response speeds, and the passive interrupt process cannot accurately locate the program execution status of the processor before the interrupt, which increases the complexity of software development

Method used

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  • Hardware synchronous circuit structure suitable for multiprocessor system and implement method thereof
  • Hardware synchronous circuit structure suitable for multiprocessor system and implement method thereof
  • Hardware synchronous circuit structure suitable for multiprocessor system and implement method thereof

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Embodiment Construction

[0048] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0049] In the hardware circuit for realizing multi-core synchronization in a multi-processor system proposed by the present invention, each synchronization unit circuit in the hardware synchronization circuit structure can be configured by any processor, and complete the synchronization of any group of processors. Each synchronization unit circuit can be configured by having exclusive access to a mutex semaphore.

[0050] figure 1 It is a circuit diagram of a hardware synchronous circuit structure applicable to a multiprocessor system provided by the present invention. This hardware synchronous circuit structure is made up of the hardware synchronous unit circuit that is connected on the system bus 101, and this hardware...

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Abstract

The invention discloses a hardware synchronous circuit structure suitable for a multiprocessor system, which can be connected with a plurality of processors in a certain interconnection mode, and provides a configuration and access interface. A target system at least comprises a plurality of processors, a hardware synchronous circuit structure and a mutex semaphore unit. Meantime, the invention discloses a method for realizing the hardware synchronous circuit structure for the multiprocessor system. The invention can efficiently realize multiprocessor communication and parallel task scheduling, and simplifies the parallel programming operation of the multiprocessor. The circuit structure is more simple and easier to use compared with other synchronous structures and methods, has low complexity, and can be conveniently integrated to a system design process.

Description

technical field [0001] The invention relates to the technical field of on-chip multi-processor systems, in particular to a hardware synchronization circuit structure suitable for multi-processor systems and an implementation method thereof. Background technique [0002] With the development of technologies such as multimedia and mobile communication, people's demand for computing power of processors is getting higher and higher. However, due to the constraints of power consumption, memory bandwidth, and operating frequency, the traditional single-core has been greatly limited in performance improvement. Therefore, increasing the parallelism of processors has become a new breakthrough to improve its computing power. The multi-processor architecture can effectively improve the parallelism of calculations and meet the requirements of computing-intensive applications. However, in terms of memory data consistency, software programming, and task scheduling, the multi-processor arc...

Claims

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Application Information

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IPC IPC(8): G06F15/163G06F13/38
Inventor 许汉荆刘建陈杰
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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