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Remediation method for unsuccessfully formed interconnected through holes on wafer

A technology for interconnecting through-holes and wafers, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, circuits, etc. It can solve problems such as increased production costs, scrapped wafers, and patterns that do not meet the requirements, so as to ensure quality and ensure good products rate and the effect of avoiding economic loss

Inactive Publication Date: 2012-11-14
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0013] The purpose of the present invention is to solve the technical problems in the prior art that the wafer needs to be scrapped directly because the pattern of the through hole formed on the wafer does not meet the requirements, which leads to the increase of production cost and other technical problems

Method used

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  • Remediation method for unsuccessfully formed interconnected through holes on wafer
  • Remediation method for unsuccessfully formed interconnected through holes on wafer
  • Remediation method for unsuccessfully formed interconnected through holes on wafer

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Embodiment Construction

[0026] In order to make the purpose and features of the present invention more obvious and understandable, the present invention will be further described by giving preferred embodiments and in conjunction with the accompanying drawings.

[0027] See figure 2 , which is a flow chart of a remedy method for failure to form interconnect vias on a wafer provided by an embodiment of the present invention. Please refer to Figure 3A to Figure 3E , wherein the wafer includes: a substrate 100 , and a dielectric layer 200 formed with a through hole 300 on the substrate 100 .

[0028] In this embodiment, the dielectric layer 200 used to form the via hole is a silicon oxide layer with a thickness greater than For example In the via hole etching process, due to various reasons, the via hole etching fails, and the pattern deformation of the formed via hole does not meet the requirements of the device. If the depth of the via hole 310 and the dielectric layer of the corresponding part...

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Abstract

The invention discloses a remediation method for unsuccessfully formed interconnected through holes on a wafer. The wafer comprises a substrate and a first medium layer with first through holes formed on the substrate. The method comprises the following steps of: removing part of first through holes which are unsuccessfully etched and medium layers of corresponding parts by chemical mechanical polishing; depositing media on the residual medium layers and filling the rest of first through holes to form a second medium layer, wherein the thickness of the deposited media is no smaller than that of the removed medium layers; and etching the second medium layer and forming second through holes on the second medium layer. The remediation method can successfully avoid the scrapped wafer caused by unsuccessful etching of the through holes, avoids related economic loss, ensures the quality of the formed through holes after remediation, cannot influence the subsequent semiconductor product manufacturing process and ensures the yield of final products.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a remedy method for the failure of forming interconnection holes on a wafer. Background technique [0002] With the development of semiconductor manufacturing process technology, the precision of semiconductor integrated circuits has reached the deep submicron size, which makes the integration degree of semiconductor devices and the complexity of manufacturing process continue to increase. Among them, the through hole is used as a channel for the interconnection of multi-layer metal layers and the connection between the active area of ​​the semiconductor device and the external circuit. Due to its important role in the structure of the semiconductor device, the precision requirements for the through hole etching process technology are also constantly increasing improve. [0003] In the prior art, in the process of forming through holes, especially when forming small-di...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768
Inventor 刘致云邹胜王春华
Owner SEMICON MFG INT (SHANGHAI) CORP
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