Clock margin measuring system, method and corresponding device

A clock and margin technology, which is applied in the field of clock margin test system for product testing, can solve the problems that the functions cannot be realized, there are no relevant technical reports on clock margin test and adjustment, and product performance is degraded, etc., so as to avoid interference effect

Active Publication Date: 2014-06-11
ZTE CORP
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Problems solved by technology

Therefore, to test the performance of various products, the test system is inseparable from the test and adjustment of the synchronous clock margin, because if the drive clock of the product exceeds this margin, it may directly cause a certain function of the product to fail to be realized, or cause the product to fail. performance of
[0004] Currently, disclosures about clock phase margin testing technology can be seen in terms of clock margin testing and adjustment, but no related technical reports have been seen in terms of clock amplitude margin testing and adjustment

Method used

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  • Clock margin measuring system, method and corresponding device
  • Clock margin measuring system, method and corresponding device
  • Clock margin measuring system, method and corresponding device

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[0036] The technical solutions of the present invention will be described in detail below in conjunction with the accompanying drawings and preferred embodiments. The following examples are only used to illustrate and explain the present invention, but not to limit the technical solution of the present invention.

[0037] Such as figure 1 Shown is the structure of the embodiment of the clock margin adjustment device for product testing provided by the present invention, the device 100 includes a clock reference level adjustment unit 110, a clock amplitude adjustment unit 120 and a clock output unit 130 connected in sequence, wherein :

[0038] The clock reference level adjustment unit 110 is configured to adjust the offset of the reference level of the input clock signal, and output the clock signal adjusted by the reference level; or directly output the input clock signal;

[0039] For example, the reference level of the drive clock of the product under test is zero level, ...

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Abstract

A clock margin test system, method and corresponding device are disclosed in the present invention. The system includes that a clock margin adjustment device, a product system under test and a product performance parameter monitoring device are connected successively. The clock margin adjustment device is set as receiving a clock signal output by a driving clock source of the product system under test, adjusting the reference level and / or amplitude of the clock signal, performing a butt matching processing on the adjusted clock signal, so as to generate the clock signal for butt-matching with the product system under test, and then output the clock signal; the product system under test is set as inputting the clock signal output by the driving clock source of the product system under test into the clock margin adjustment device, receiving the clock signal output by the clock margin adjustment device and providing it as a driving clock to the part, which requires the driving clock, of the product system under test; the product performance parameter monitoring device is set as monitoring the performance parameter of the product under test when the part, which requires the driving clock, of the product system under test works under driving of the driving clock.

Description

technical field [0001] The invention relates to product testing technology, in particular to a clock margin testing system, method and corresponding device for product testing. Background technique [0002] With the continuous deepening of circuit hardware testing, people not only need to ensure the correct implementation of the designed product functions and excellent performance through testing, but also do some margin testing to obtain the specific performance indicators of the product, so that it can be used as much as possible. Have a comprehensive understanding of the designed product. At the same time, margin testing is also of great help to product material selection, product maintenance, and troubleshooting of fault recurrence. In the current situation of fierce competition in the market, product developers should not only care about the function of the product, but also compete with the performance of the product under the same product function, so that the limit ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B17/00H04L7/00
CPCH04B17/008H04B17/0085H04B17/0062H04B17/21H04B17/29
Inventor 肖永黄健
Owner ZTE CORP
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