Method and system for active replication for Cache of multi-core processor

A technology of multi-core processors and replication methods, applied in memory systems, transmission systems, electrical digital data processing, etc., can solve the problems of data aggregation, performance degradation, unreasonable distribution, and low utilization, and avoid unreasonable distribution of copies , avoid copy redundancy and improve utilization efficiency

Inactive Publication Date: 2012-09-05
TSINGHUA UNIV
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0005] 1. Based on local decision-making, without considering the data sharing mode, it has a certain degree of blindness, the redundancy of the copy is large, and the distribution is unreasonable;
[0006] 2. The copied copy can only be used locally, and the utilization rate is low;
[0007] 3. Multi-directional migration causes data aggregation and performance degradation;
[0008] 4. Additional consistency problems and additional overhead caused by imprecise classification methods;
[0010] 6. The search for copied and migrated data is complex and time-consuming

Method used

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  • Method and system for active replication for Cache of multi-core processor
  • Method and system for active replication for Cache of multi-core processor
  • Method and system for active replication for Cache of multi-core processor

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Embodiment Construction

[0041] The active replication method and system for the Cache of multi-core processors proposed by the present invention will be described in detail with reference to the drawings and embodiments.

[0042] The Cache active migration (Cache Active Migration, CAM) method, system and hardware implementation method for multi-core processors proposed by the present invention combine the characteristics of replication and migration, and use the principle of locality to analyze the data access mode in real time. Frequently accessed data blocks in the L2 Cache are actively migrated to the L2 Cache of one or more nodes that have frequently accessed the data recently. The host node tracks the location of these copies, effectively controls the number and distribution of the copies, and maintains the consistency of the copies. sex. In order to improve the utilization rate of replicas and reduce the redundancy of replicas, CAM effectively controls the number and distribution of replicas, a...

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Abstract

The invention discloses a method and system for active replication for a Cache of a multi-core processor. The method comprises the following steps: S1, a host node analyzes the position and access times of a processor core which accesses to a data block in a shared L2 Cache, and selects a candidate replica node; S2, if the accessed times of the data block reach a replica threshold, the data blockis replicated in the replica node and the position of a replica is recorded; S3, if receiving a read request for the replicated data block, the host node forwards the read request to the nearest replica node, and the replica node responds to the data block; S4, after receiving the response, a request node can record the position of the replica node in an address mapping table, and transmits a follow-up read request for the data block to the replica node. The method and the system avoid replica redundancy and unreasonable distribution caused by blind replication, and have the access delay which is close to the low delay of a private L2 Cache, and the capacity which is approximate to the large capacity of the shared L2 Cache.

Description

technical field [0001] The present invention relates to the technical field of Cache (cache memory), in particular to an active copy method and system for Cache of multi-core processors. Background technique [0002] The last level of Cache (L2 Cache) of a multi-core processor usually adopts a distributed design, which presents the characteristics of Non-Uniform Cache Access (NUCA). The access delay of the processor to the L2 Cache depends on the processor core and each Physical distance between L2 caches. There are two ways to organize L2 Cache: private L2 Cache design and shared L2 Cache design. The private L2 Cache design is that the processor core uses the local L2 Cache as a private Cache to obtain more local access and reduce access latency. The shared L2 Cache design distributes data to each L2 Cache through address crossing. There is a large amount of duplicate data in the private L2 Cache design, which reduces the effective capacity of the L2 Cache and leads to m...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/167G06F12/08H04L29/08G06F12/0808
Inventor 王惊雷汪东升
Owner TSINGHUA UNIV
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