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Method for producing shallow trench isolating structure

A technology of isolation structure and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as affecting the quality of semiconductor devices, and achieve the effect of avoiding excessive etching.

Active Publication Date: 2013-06-19
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, since the first protective layer 3a is thinner than the thickness of the second protective layer 3b after the chemical mechanical polishing process, under the same etching rate and etching time of the first protective layer 3a and the second protective layer 3b, the second protective layer Excessive etching occurs at the corners where the trioxide layer 5 and the first oxide layer 1a meet, destroying the structure of the third oxide layer 5 and the active region, and affecting the quality of the semiconductor device.

Method used

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  • Method for producing shallow trench isolating structure
  • Method for producing shallow trench isolating structure
  • Method for producing shallow trench isolating structure

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Embodiment Construction

[0020] The embodiments of the present invention etch the protective layer on the wafer by using the second wet etching process, preventing the protective layer of the wafer from being over-etched when only one wet etching method is used, and destroying the shallow trench isolation and the silicon liner. The bottom structure affects the quality of semiconductor devices.

[0021] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0022] figure 2 For making flowchart of the present invention, Figures 3A to 3F It is a flow chart of the manufacturing method of the shallow trench isolation structure of the present invention.

[0023] Reference attached Figure 3A-3F , step S200, providing a wafer on which a silicon substrate has been formed, forming a first oxide layer and a second oxide layer...

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Abstract

The invention discloses a method for producing a shallow trench isolating structure, comprising the following steps of: providing a wafer on which a silicon substrate is formed, respectively forming a first oxidation layer and a second oxidation layer on the front side and the back side of the silicon substrate and respectively forming a first protecting layer and a second protecting layer on thefirst oxidation layer and the second oxidation layer; etching the first protecting layer, the first oxidation layer and the silicon substrate by a dry method; depositing third oxidation layers on thefirst protecting layer and the exposed silicon substrate; etching by a wet method for the first time to remove a part of second protecting layer; flattening the third oxidation layer until the first protecting layer is exposed; and etching by the wet method for the second time to remove the first protecting layer and the second protecting layer and form the shallow trench isolating structure. Thefirst protecting layer and the second protecting layer are removed by etching through a wet method for two times, so that the first protecting layer and the second protecting layer are ensured to be synchronously and thoroughly removed and also the phenomenon in the prior art that the shallow trench isolating structure and the silicon substrate are damaged to further influence the quality of a semiconductor device because the excessive etching generates in the process of etching the first protecting layer is avoided.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for manufacturing a shallow trench isolation structure. Background technique [0002] In semiconductor manufacturing technology, in order to electrically insulate different semiconductor devices manufactured on the semiconductor substrate, shallow trench isolation (STI) regions are usually formed between different semiconductor devices on the semiconductor substrate. The formation method of STI usually includes: first etching a trench on the semiconductor substrate, filling the trench with an insulating medium until the trench is filled, and then performing rapid thermal treatment (RTP) to make the insulating dielectric layer denser and to make the trench The stress in the insulating medium inside is uniformly distributed; then planarization is performed to remove the insulating medium on the semiconductor substrate and the insulating medium on the top of the trench until t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/762
Inventor 胡亚兰刘佳磊
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP