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Strain GeOI structure and forming method thereof

A kind of stress and thin layer technology, applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve the problems of interface state difference, Ge layer is difficult to form strain, etc., to improve device performance, improve interface state problems, reduce leakage and scattering Effect

Active Publication Date: 2011-08-31
TSINGHUA UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to solve at least one of the above-mentioned technical defects, especially the defect that the interface state between Ge and the oxide insulator in the current GeOI structure is very poor, and the defect that the Ge layer is difficult to form strain

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  • Strain GeOI structure and forming method thereof
  • Strain GeOI structure and forming method thereof
  • Strain GeOI structure and forming method thereof

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Embodiment Construction

[0021] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0022] The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and arrangements of specific examples are described below. Of course, they are only examples and are not intended to limit the invention. Furthermore, the present invention may repeat reference numerals and / or letters in different instances. This repetition is for the purpose of simplicity and clarity and does not in itself indicat...

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Abstract

The invention provides a strain GeOI structure which comprises a silicon substrate with an oxide insulating layer on a surface; a Ge layer formed on the oxide insulating layer, wherein a first passivation thin layer is formed between the Ge layer and the oxide insulating layer; a gate stack is formed on the Ge layer, and a channel region formed below the gate stack, and drain region and a source region formed at both sides of the channel region; and a SiN strain cap layer for covering the gate stack to enable the channel region to produce strain. The passivation thin layer formed by strontium germanide or barium germanide in the invention embodiment belongs to the semiconductor; an interface state problem between the Ge material and the insulating oxide can be improved through a first passivation layer so as to reduce the electric leakage and scattering at the interface. Furthermore, the SiN strain cap layer enables the channel region to produce strain so as to improve the performance of the appliance.

Description

technical field [0001] The invention relates to the technical field of semiconductor design and manufacture, in particular to a strained GeOI (Ge on insulator) structure and a forming method thereof. Background technique [0002] For a long time, the feature size of Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) has been following the so-called Moore's law (Moore's law), and its working speed is getting faster and faster. However, for Si-based material itself As far as it is concerned, it is already close to the double limit of physics and technology. Therefore, various methods have been proposed in order to continuously improve the performance of MOSFET devices, and thus the development of MOSFET devices has entered a so-called post-Moore (More-Than-Moore) era. High-mobility channel engineering based on heterogeneous material structures, especially high-carrier mobility material systems such as Si-based Ge materials, is one of the effective technologies. For e...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/78H01L21/762H01L21/336
Inventor 王敬许军郭磊
Owner TSINGHUA UNIV
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