Method of fabricating gate electrode of semiconductor element using a treated hard mask

Abstract

The invention discloses a method for manufacturing a gate electrode of a semiconductor element by using a processed hard mask. Firstly, a polysilicon gate electrode layer is provided on the substrate. In one embodiment, a treatment is performed on the polysilicon gate electrode layer to introduce a species into the polysilicon gate electrode layer and form an electrical neutralization in the polysilicon gate electrode layer. Area. Then, a hard mask layer with a limited thickness is formed on the processed polysilicon gate electrode layer. After patterning the hard mask layer and the processed polysilicon gate electrode layer to form the gate structure, an oblique angle ion implantation step is performed on the substrate.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor element, in particular to a method for manufacturing a gate electrode of a semiconductor element using a processed hard mask. Background technique [0002] As technology nodes shrink, in some integrated circuit (IC) designs, it is necessary to use metal gates instead of traditional polysilicon gate electrodes to improve device performance while reducing feature sizes. Providing a metal gate structure (eg including a metal gate electrode instead of polysilicon) provides a solution. One of the processes for forming a metal gate stack structure is called the "gate last" process, which is to make the final gate stack structure at the "last" of the process to reduce subsequent The number of process steps, while the subsequent process steps include the high temperature processing that must be performed after the gate is formed. Additionally, as transistor dimensions shrink, the gate oxide ...

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Problems solved by technology

However, the thick hard mask layer will exacerbate the shadowing effects when implanting the pocket area / LDD area

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