Semiconductor structure with suspended sources and drains as well as formation method thereof

Abstract

The invention provides a semiconductor structure with suspended sources and drains, comprising a substrate, a plurality of raised structures formed on the substrate, suspended thin films and grid stacks, wherein the suspended thin film is formed between every two raised structures and connected with the tops of the two raised structures; the raised structures are channels; the suspended thin films at two sides of each raised structure are a source and a drain respectively; insulating materials are filled among the raised structures so as to cause the raised structures as the channels to generate strain; and the grid stacks are formed on the raised structures. According to the embodiment of the invention, the suspended source and drain structure is adopted, so that doped impurities in the sources and drains are inhibited from spreading to the substrate, thus being easy to manufacture ultra shallow junctions; and because the sources and drains do not contact with the substrate, BTBT (band to band tunneling) current leakage between the sources as well as drains and the substrate can be avoided. In addition, the insulating materials are filled among the raised structures, so that the raised structure as the channels can generate strain, thus further improving device performances.

Description

technical field [0001] The invention relates to the technical field of semiconductor design and manufacture, in particular to a semiconductor structure with suspended sources and drains and a forming method thereof. Background technique [0002] For a long time, in order to obtain higher chip density, faster working speed and lower power consumption. The feature size of Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) has been continuously scaling down in accordance with the so-called Moore's law, and their operating speeds are getting faster and faster. At present, it has entered the range of nanoscale. However, a serious challenge that comes with it is the appearance of short-channel effects, such as subthreshold voltage drop (Vt roll-off), drain-induced barrier lowering (DIBL), and source-drain punch through (punch through), etc. , making the off-state leakage current of the device significantly increased, resulting in performance degradation. [0003] In a...

AI Technical Summary

Problems solved by technology

However, a serious challenge that comes with it is the short channel effect, such as subthreshold voltage drop (Vt roll-off), drain-induced barrier lowering (DIBL), source-drain punch through, etc. , which significantly increases the off-state leakage current of the device, leading to performance degradation

[0003] In addition, the leakage current can be reduced through the SOI (Silicon On Insulator) structure, but the SiO in SOI 2 The thermal conductivity of the insulating layer is low, and the heat generated in the channel of the small-sized device is not easy to dissipate, so the heat dissipation of the SOI device is suppressed

[0004] Therefore, for the current device structure, large leakage and difficult heat dissipation are the key factors restricting the miniaturization of the device.

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