Semiconductor structure having suspended source and suspended drain, and formation method of semiconductor structure

Abstract

The embodiment of the invention provides a device structure having a suspended source and a suspended drain. The device structure comprises a Si substrate, a plurality of protrusion structures formed on the Si substrate, suspended thin layers which are formed between every two protrusion structures and connected with the top parts of the two protrusion structures, and grid stacks formed on the protrusion structures, wherein a certain gap of less than 50 nanometers is formed between the two protrusion structures; the protrusion structures are channels; and suspension thin layers on both sides of each of the protrusion structures serve as the source and the drain. In the embodiment of the invention, a suspended source and drain structure is used, so that the diffusion of doped impurities inthe source and the drain towards the substrate is restrained and an ultra shallow junction is easy to prepare; furthermore, the source and the drain are not contacted with the substrate, so band-to-band tunnel (BTBT) electricity leakage between the source / drain and the substrate is restrained.

Description

technical field [0001] The invention relates to the technical field of semiconductor design and manufacture, in particular to a semiconductor structure with suspended sources and drains and a forming method thereof. Background technique [0002] For a long time, in order to obtain higher chip density, faster working speed and lower power consumption. The feature size of Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) has been continuously scaling down in accordance with the so-called Moore's law, and their operating speeds are getting faster and faster. At present, it has entered the range of nanoscale. However, a serious challenge that comes with it is the appearance of short-channel effects, such as subthreshold voltage drop (Vt roll-off), drain-induced barrier lowering (DIBL), and source-drain punch through (punch through), etc. , making the off-state leakage current of the device significantly increased, resulting in performance degradation. In addition, ...

AI Technical Summary

Problems solved by technology

However, a serious challenge that comes with it is the short channel effect, such as subthreshold voltage drop (Vt roll-off), drain-induced barrier lowering (DIBL), source-drain punch through, etc. , which significantly increases the off-state leakage current of the device, leading to performance degradation

In addition, the leakage current can be reduced through the SOI (Silicon On Insulator) structure, but the SiO in SOI 2 The thermal conductivity of the insulating layer is low, and the heat generated in the channel of the small-sized device is not easy to dissipate, so the heat dissipation of the SOI device is suppressed

[0003] Therefore, for the current device structure, large leakage and difficult heat dissipation are the key factors restricting the miniaturization of the device.

Images