CPU interconnecting device

An interface module and data technology, applied in the electronic field, can solve problems such as poor scalability, high cost, and long data transmission delay, and achieve the effects of reducing data transmission delay, strong flexibility, and high scalability

Active Publication Date: 2013-01-02
HUAWEI TECH CO LTD
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The embodiment of the present invention provides a CPU interconnection device, which is used to solve the defects of poor scalability, long data transmission delay and high cost of the existing inter-CPU interconnection system

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • CPU interconnecting device
  • CPU interconnecting device
  • CPU interconnecting device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0027] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0028] Figure 1A It is a schematic structural diagram of a CPU interconnection device provided by an embodiment of the present invention. The CPU interconnection device in the embodiment of the present invention may be realized by using a Field Programmable Gate Array (Field Programmable Gate Array, FPGA for short). like Figure 1A As shown...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The present disclosure provides a CPU interconnect device, the CPU interconnect device connects with a first CPU, which includes a quick path interconnect QPI interface and a serial deserial SerDes interface, the quick path interconnect QPI interface receives serial QPI data sent from a CPU, converts the received serial QPI data into a parallel QPI data, and outputs the parallel QPI data to the serial deserial SerDes interface; the serial deserial SerDes interface converts the parallel QPI data output by the QPI interface into a high-speed serial SerDes data and then send the high-speed serial SerDes data to another CPU interconnect device connected with another CPU. The defects of poor scalability, long data transmission delay, and a high cost of an existing interconnect system among CPUs can be solved.

Description

technical field [0001] The embodiment of the present invention relates to electronic technology, and in particular to a CPU interconnection device. Background technique [0002] The interconnection between the CPUs is realized by the full direct connection of the PCB boards of IBM. Each IBM Power CPU comes with 7 high-speed interconnection ports, which can be interconnected with 7 Power CPUs at the same time. 8 Power CPUs can form an 8P system through full direct connection. But because the Power CPU integrates the function of the NC controller, the cost is relatively high. Limited by the number of Power CPU interconnection ports, the CPU system composed of Power CPUs has poor scalability and low flexibility. [0003] HP uses NC node controllers and switch modules to realize the interconnection between CPUs, and the system of the entire interconnection architecture is complex. In this solution, two chips are added to the whole system to realize the functions of NC node c...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): G06F15/163
CPCG06F15/17G06F13/4282G06F13/4059G06F13/4265G06F2213/0038G06F2213/3852G06F13/40
Inventor 常胜杨荣玉侯新宇
Owner HUAWEI TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap