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Forming method and device of bump structure

A bump, packaging substrate technology, applied in the directions of transportation and packaging, sustainable manufacturing/processing, final product manufacturing, etc., can solve problems such as cracks in solder bumps 104, and achieve the effect of reducing stress and reducing cracks

Active Publication Date: 2012-02-08
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] One problem found in conventional bonding structures is that after the bonding process, cracks often occur within the solder bump 104, especially near the junction of the solder bump 104 and the solder resists 112 and 114.

Method used

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  • Forming method and device of bump structure
  • Forming method and device of bump structure
  • Forming method and device of bump structure

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Embodiment Construction

[0014] The making and using of the disclosed embodiments are discussed in detail below, however, it should be appreciated that the embodiments provide many applicable inventive concepts that can be implemented in a wide variety of specific contexts and that the specific embodiments discussed herein are used only It is for illustration and not intended to limit the scope of the disclosure.

[0015] Embodiments of the present invention provide a new thermal compression bonding process (thermal compress bonding; TCB). The intermediate stages of manufacturing various embodiments are described below. In the various drawings and embodiments, similar reference numerals are used to indicate similar components.

[0016] Figure 4 A schematic cross-sectional view of a work piece 26 is shown. In one embodiment, the work piece 26 is a package substrate or interposer that does not have active components, such as transistors, therein. In another embodiment, workpiece 26 is a device die ha...

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Abstract

A method of forming a bump structure includes providing a first work piece including a dielectric layer having a top surface; placing a second work piece facing the first work piece; placing a heating tool contacting the second work piece; and heating the second work piece using the heating tool to perform a reflow process. A first solder bump between the first and the second work pieces is melted to form a second solder bump. Before the second solder bump solidifies, pulling the second work piece away from the first work piece, until an angle formed between a tangent line of the second solder bump and the top surface of the dielectric layer is greater than about 50 degrees, wherein the tangent line is drawn at a point where the second solder bump joins the dielectric layer.

Description

technical field [0001] This invention relates to the processing of integrated circuits, and more particularly to the use of thermocompression bonding to form low stress joints. Background technique [0002] An integrated circuit is formed on a semiconductor wafer, then diced into semiconductor chips, and then the semiconductor chips are bonded to a packaging substrate. Figure 1 to Figure 3 A schematic cross-sectional view of each intermediate stage in a conventional bonding process is shown. refer to figure 1 , providing a package substrate 100 having bonding pads 108 on a surface of the package substrate 100 . The chip 102 is picked up and turned over so that the solder bumps 104 on the surface of the chip 102 face down, and flux 106 is applied on the solder bumps 104 . [0003] Next, if figure 2 As shown, chip 102 is placed on package substrate 100 with solder bumps 104 placed against bond pads 108 . Then, the packaging substrate 100 and the chip 102 are subjected t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/60H01L21/603H01L23/00
CPCH01L21/563H01L24/05H01L24/13H01L24/16H01L24/75H01L24/81H01L25/0657H01L25/50H01L2224/0401H01L2224/05073H01L2224/05166H01L2224/05647H01L2224/13147H01L2224/16058H01L2224/16145H01L2224/16225H01L2224/75252H01L2224/75302H01L2224/75824H01L2224/81193H01L2224/81203H01L2224/81815H01L2224/81947H01L2225/06513H01L2924/01029H01L2924/01033H01L2924/014H05K3/3436H05K2203/082H05K2201/10674H01L2224/73204B23K1/0016H01L2924/14Y10T428/24612Y02P70/50H01L2224/131H01L2924/00014H01L2924/00B23K31/02H05K1/144H05K1/181
Inventor 黄贵伟林威宏王林伟张博平郑明达刘重希
Owner TAIWAN SEMICON MFG CO LTD