Forming method of metal-oxide semiconductor (MOS) transistor source drain stress area and manufacturing method of MOS transistor

Abstract

The invention relates to a forming method of a metal-oxide semiconductor (MOS) transistor source drain stress area, which comprises the steps that: a semi-conductor substrate is provided, and a sacrifice grid is formed on the semi-conductor substrate; ions are implanted into the semi-conductor substrate, and an amorphous area is formed in the semi-conductor substrate on both sides of the sacrifice grid; a dielectric layer which contains inherent stress is formed on the semi-conductor substrate; the semi-conductor substrate is annealed; and a source drain stress area is formed in the amorphous area on both sides of the sacrifice grid. The forming method of the MOS transistor source drain stress area reduces the difficulty in filling a stress film above a source drain is reduced and greatly improves the stress conversion proportion to a channel by directly forming the dielectric layer which contains the inherent stress on the source drain area on both sides of a grid to introduce stress. Simultaneously, the semi-conductor substrate which is pre-amorphousized in the source drain area transfers the stress into the source drain area, so that the stress of an original etched dielectric layer and a channel area after a side wall is formed is still maintained, and the stress changes improve the carrier mobility.

Description

technical field [0001] The invention relates to the technical field of semiconductors, and more specifically, the invention relates to a method for forming a source-drain stress region of a MOS transistor and a method for manufacturing the MOS transistor. Background technique [0002] With the continuous development of integrated circuit manufacturing technology, the feature size of MOS transistors is getting smaller and smaller. However, while the feature size of MOS transistors keeps shrinking, the contradiction between device power consumption and speed becomes increasingly prominent, which hinders the further development of integrated circuit technology. [0003] Improving the carrier mobility in the channel region of the MOS transistor is an effective means to solve the power consumption-speed contradiction. On the basis of the substantial increase in the carrier mobility in the channel region, the MOS transistor can use a lower power supply voltage to reduce power con...

AI Technical Summary

Problems solved by technology

For MOS transistors, the stress introduced by the channel region can change the lattice structure of the substrate, thereby affecting the energy band structure of the channel region, thereby affecting the carrier mobility of the channel region

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