Low-cost electrically erasable programmable read only memory (EEPROM) array

Abstract

The invention discloses a low-cost electrically erasable programmable read only memory (EEPROM) array, comprising a plurality of parallel bit lines, word lines and a common source line, wherein the bit lines are divided into a plurality of groups of the bit lines, including a first group of the bit lines; the word lines comprise a first word line and a second word line; the common source line comprises a first common source line. The low-cost EEPROM array further comprises a plurality of sub-memory arrays; each sub-memory array is connected with one group of the bit lines, two word lines and one common source line, and further comprises a first memory unit cell and a second memory unit cell; the first memory unit cell is connected with the first group of the bit lines, the first common source line and the first word line; the second memory unit cell is connected with the first group of the bit lines, the first common source line and the second word line; and the first memory unit celland the second memory unit cell are symmetrically configured with each other and respectively located on two different sides of the first common source line. The low-cost EEPROM array not only is lowin cost but also has byte writing-in and erasing functions.

Description

technical field [0001] The present invention relates to a memory array, in particular to a low-cost electrically erasable programmable read-only memory (EEPROM) array. Background technique [0002] Complementary Metal Oxide Semiconductor (CMOS) process technology has become a common manufacturing method for application specific integrated circuits (ASICs). Today, with the development of computer information products, both Flash memory (Flash) and Electrically Erasable Programmable Read Only Memory (EEPROM) have non-volatile memory for electrically writing and erasing data. It has a permanent memory function, and the data will not disappear after the power is turned off, so it is widely used in electronic products. [0003] Non-volatile memory is programmable, which is used to store charge to change the gate voltage of the memory transistor, or not store charge to leave the gate voltage of the original memory transistor. The erasing operation is to remove the charge stored ...

AI Technical Summary

Problems solved by technology

For the current flash memory architecture, although the area is small and the cost is low, it only supports the erasing and writing of large blocks, and cannot only erase and write a specific memory cell, which is inconvenient to use. ; In addition, for the structure of electronic erasable programmable read-only memory, it has the function of byte write (byte write), which is more convenient to use than flash memory, and its one-bit memory cell circuit diagram, And the cross-sectional view of the memory unit cell structure, respectively as figure 1 , figure 2 shown

Each memory unit cell comprises two transistors: a memory transistor 10, a selection transistor 12 and a capacitance structure 13, the capacitance structure 13 is arranged on the top of the memory transistor 10, as a polysilicon memory unit cell, due to such structure, cause The area is larger than that of flash memory, and when erasing bits, it is often necessary to isolate unselected positions with transistors, thereby increasing cost requirements

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