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A kind of preparation method of silicon nanowire

A technology of silicon nanowires and top silicon, which is used in the manufacture of semiconductor/solid-state devices, electrical components, circuits, etc., can solve the problems of high process requirements and high photolithography process requirements, and achieves simple process preparation methods, wide application prospects, and convenience. production effect

Active Publication Date: 2016-03-02
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The purpose of the present invention is to provide a method for preparing silicon nanowires, so as to solve the problem that the existing methods for preparing silicon nanowires have relatively high technological requirements, especially the high requirements for photolithography.

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  • A kind of preparation method of silicon nanowire
  • A kind of preparation method of silicon nanowire
  • A kind of preparation method of silicon nanowire

Examples

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preparation example Construction

[0040] Please refer to figure 1 , which is a block diagram of a method for preparing silicon nanowires according to an embodiment of the present invention. Such as figure 1 Shown, the preparation method of described silicon nanowire comprises the steps:

[0041] S10: providing an SOI substrate, where the SOI substrate includes a bottom silicon substrate, a buried oxide layer on the bottom silicon substrate, and a top silicon film on the buried oxide layer;

[0042]S11: forming a silicon nitride layer on the top silicon film;

[0043] S12: Define an active region by photolithography using the first mask, and etch and remove the silicon nitride layer outside the active region;

[0044] S13: Using the silicon nitride layer in the active region as a mask, etch and remove the top silicon film outside the active region, and at the same time, make the sidewall of the top silicon film in the active region slope-shaped;

[0045] S14: performing an oxidation process on the top silic...

Embodiment 1

[0054] Please refer to Figure 2a-2c , Figure 3a~3h and Figure 4 ,in, Figure 2a is a schematic top view of the first mask used in the method for preparing silicon nanowires in Example 1 of the present invention; Figure 2b is a schematic top view of the second mask used in the method for preparing silicon nanowires in Example 1 of the present invention; Figure 2c It is a schematic diagram of registration with the first mask when the second mask is used in the method for preparing silicon nanowires in Embodiment 1 of the present invention; Figure 3a~3h It is the preparation method of the silicon nanowire according to the first embodiment of the present invention. Figure 2c Schematic diagram of the cross-sectional process in the direction indicated by AA' in the middle; Figure 4 It is the preparation method of the silicon nanowire according to the first embodiment of the present invention. Figure 2c The schematic cross-sectional view of the direction indicated by B...

Embodiment 2

[0065] Please refer to Figures 5a-5c and Image 6 ,in, Figure 5a is a schematic top view of the first mask used in the method for preparing silicon nanowires in Example 2 of the present invention; Figure 5b is a schematic top view of the second mask used in the method for preparing silicon nanowires in Example 2 of the present invention; Figure 5c It is a schematic diagram of registration with the first mask when the second mask is used in the method for preparing silicon nanowires according to Embodiment 2 of the present invention; Image 6 It is the preparation method of the silicon nanowire according to the second embodiment of the present invention. Figure 5c The schematic cross-sectional view in the direction indicated by AA'.

[0066] The difference between this embodiment and Embodiment 1 is that the first mask 40 used (such as Figure 5a Shown) the graphics include a plurality of "I" fonts connected in sequence. And the used second mask 41 (such as Figure ...

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Abstract

The invention provides a preparation method for a silicon nanowire. The preparation method comprises the following steps of: providing a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises a bottom silicon substrate, a buried oxide layer positioned on the bottom silicon substrate and a top silicon film positioned on the buried oxide layer; forming a silicon nitride layer on the top silicon film; photoetching and defining an active area by utilizing a first mask plate, and removing the silicon nitride layer outside the active area in an etching way; removing the top silicon film outside the active area in the etching way by taking the silicon nitride layer of the active area as a mask, and simultaneously making the sidewall of the top silicon film of the active area form a slope shape; performing an oxidization process on the top silicon film of the active area to form a sidewall oxide layer on the sidewall of the top silicon film of the active area; removing the silicon nitride layer of the active area in the etching way; photoetching and defining a silicon nanowire supporting area by utilizing a second mask plate, and etching the top silicon film of the active area under the protection of the sidewall oxide layer to form the silicon nanowire with a triangular section; and removing the sidewall oxide layer and part of the buried oxide layer in the etching way to suspend the silicon nanowire in midair. The preparation method is simple, controllable and low in production cost.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a method for preparing silicon nanowires. Background technique [0002] In recent years, with people's continuous exploration and research in the field of nanotechnology, materials with one-dimensional nanostructures, such as silicon nanowires, have attracted more and more people's attention. Silicon nanowires have significant quantum effects, large specific surface area and other characteristics, and have good application prospects in MOS devices, sensors and other fields. How to prepare silicon nanowires in a simple, controllable and low-cost way has become an important topic. [0003] The preparation methods of silicon nanowires can be mainly divided into two categories: "bottom-up" and "top-down". The bottom-up approach mainly relies on nanotechnology, using catalysts to catalyze the growth of nanowires. Although this method can produce silicon nan...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02
Inventor 范春晖王全
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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