Application-level random instruction testing method, system and device

Abstract

The embodiment of the invention discloses an application-level random instruction testing method, system and device, which can not generate testing blind areas or weak links easily. The method comprises the following steps of: randomly selecting multiple instruction templates from a specified instruction set; and testing for the preset times by utilizing the instruction templates, and obtaining test results. Each test comprises the following steps of: respectively executing assembly instructions which are randomly generated according to the instruction templates by using a hardware platform and a simulation platform, and obtaining respective execution results, wherein the specified memory spaces and registers of the hardware platform and the simulation platform are initialized. Each test result includes a comparison result, and the comparison result is obtained by comparing whether the execution result of the hardware platform is the same as the execution result of the simulation platform. In the invention, the selection of the instruction templates and the generation of the assembly instructions are random, and especially, when the preset times are large enough, blind areas or weak links which are difficult to test by conventional programs / test cases are easier to test, so that testing blind areas or weak links are not easy to generate.

Description

technical field [0001] The invention relates to the technical field of microprocessing verification, and more specifically, to an application-level random instruction testing method, system and device. Background technique [0002] In the development process of the microprocessor, it is necessary to carry out application-level testing on its functions, and the main way of functional testing is the test verification based on the instruction set. [0003] When performing application-level testing, the general method is to manually write a program / test case composed of multiple microprocessor instructions, and run them on the operating system-based hardware platform (the hardware platform is the physical reference model of the microprocessor to be tested) Execute with a simulation platform based on the same operating system (the simulation platform is a software reference model of the microprocessor to be tested), and compare the execution results. [0004] However, in the pro...

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Problems solved by technology

[0004] However, in the process of implementing the present invention, the inventor found that in the instruction set of the microprocessor, the number of instruction templates is as many as hundreds, and the operand space corresponding to each instruction template is also astronomical. The combinations of generated instructions are even more diverse. To perform application-level testing on microprocessors, it is almost impossible to cover all instructions by manually writing programs / test cases, which will bring blind spots or weak links in testing.

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