Method for forming shallow-ditch isolating structure

Abstract

The invention discloses a method for forming a shallow-ditch isolating structure. The method comprises the following step of: providing a semiconductor substrate, wherein the semiconductor substrate is provided with an edge area and a center area. The method is characterized by also comprising the following steps of: forming a pad oxide layer on the surface of the semiconductor substrate, wherein the pad oxide layer positioned in the edge area and the pad oxide layer positioned in the center area have thickness difference; forming an etching stop layer on the surface of the pad oxide layer, wherein the thickness difference of the etching stop layer positioned in the edge area and the etching stop layer positioned in the center area is complementary with that of the pad oxide layer positioned in the edge area and the pad oxide layer positioned in the center area; forming a shallow ditch positioned in the substrate and penetrating the etching stop layer and the pad oxide layer; forming a medium layer positioned on the surface of the etching stop layer and fully filling the shallow ditch; and flattening the medium layer until the etching stop layer is exposed. The shallow ditch formed by the method has the advantage that the height difference of the shallow ditch positioned in the edge area and the shallow ditch positioned in the center area is small.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a shallow trench isolation structure. Background technique [0002] As semiconductor technology enters the deep sub-micron era, components below 0.18 microns, such as FLASH (flash memory), LOGIC (logic device), or active regions of CMOS integrated circuits, mostly use shallow trench isolation structures for lateral isolation. More information about shallow trench isolation technology can be found in US Patent No. US7112513. [0003] The shallow trench isolation structure is a device isolation technology, and its specific process includes: forming a shallow trench penetrating through the pad oxide layer and the etch stop layer in the substrate sequentially formed with the pad oxide layer and the etch stop layer groove, the forming method of the shallow trench can be an etching process; fill the shallow trench with a medium, and form a dielectric lay...

AI Technical Summary

Problems solved by technology

[0005] The problem solved by the present invention is to form a shallow trench isolation structure with a smaller height difference between the edge region and the central region

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