Voltage amplitude limiting circuit for controlling current supply switch of current steering analog-to-digital converter
A digital-to-analog converter and limiter circuit technology, applied in the direction of digital-to-analog converters, can solve problems such as limiting the output voltage range of digital-to-analog converters, and achieve the effect of reducing glitches and steep rising edges
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Embodiment 1
[0035] Figure 5 It is the circuit principle diagram of Embodiment 1 of the limiting circuit of the present invention. The limiting circuit is composed of 1 NMOS transistor, 4 PMOS transistors and a standard inverter INV. Wherein, the PMOS transistor MP1 constitutes the resistance unit, the source of the PMOS transistor MP1 is electrically connected to the voltage source VDD of the limiter circuit, the gate of the PMOS transistor MP1 is grounded, and the drain of the PMOS transistor MP1 is connected to the limiter circuit The output terminal OUT is electrically connected. The PMOS transistor MP2 and the PMOS transistor MP3 constitute the third switch unit, wherein the source of the PMOS transistor MP2 is electrically connected to the voltage source VDD of the limiter circuit, the drain of the PMOS transistor MP2 is short-circuited to the source of the PMOS transistor MP3, The gate of the PMOS transistor MP2 is connected to the output terminal of the inverter INV; the drain a...
Embodiment 2
[0048] Embodiment 2 of the present invention adopts the equivalent circuit of Embodiment 1, its principle is basically the same as Embodiment 1, and its circuit structure is as follows Image 6 shown.
[0049] The same as the first embodiment, the first switch unit and the second switch unit in the second embodiment also respectively use the NMOS transistor MN5 and the PMOS transistor MP4, the gate of the PMOS transistor MP4 and the gate of the NMOS transistor MN5 Short-circuited and connected to the input terminal IN of the limiting circuit, the source of the PMOS transistor MP4 and the drain of the NMOS transistor MN5 are short-circuited and electrically connected to the output terminal OUT of the limiting circuit, and the drain of the PMOS transistor MP4 It is short-circuited with the source of the NMOS transistor MN5 and grounded; the input terminal of the inverter INV is electrically connected with the input terminal IN of the limiting circuit.
[0050] The difference fr...
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