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Method for implementing parallel-flash translation layer and parallel-flash translation layer system

A flash memory conversion layer, physical block technology, applied in the direction of memory address/allocation/relocation, input/output to the record carrier, etc., can solve the problem that less consideration is given to the parallel operation properties of flash memory, which restricts the performance of flash memory storage of electronic products, and is not easy to achieve. and other problems to achieve the effect of reducing complexity, improving efficiency, and reducing garbage collection time

Active Publication Date: 2012-07-25
TSINGHUA UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Block-mapped flash translation layers can save a lot of memory space for storing mapping information, but their performance is relatively low
Hybrid mapped flash translation layers provide a balance of high performance and low memory requirements, however are often too complex to implement
[0005] The traditional flash translation layer rarely takes into account the parallel operation properties provided by flash memory, and the time consumed by NAND flash write and erase operations restricts the flash memory storage performance of electronic products

Method used

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  • Method for implementing parallel-flash translation layer and parallel-flash translation layer system
  • Method for implementing parallel-flash translation layer and parallel-flash translation layer system
  • Method for implementing parallel-flash translation layer and parallel-flash translation layer system

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Embodiment Construction

[0044] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0045]These and other aspects of embodiments of the invention will become apparent with reference to the following description and drawings. In these descriptions and drawings, some specific implementations of the embodiments of the present invention are specifically disclosed to represent some ways of implementing the principles of the embodiments of the present invention, but it should be understood that the scope of the embodiments of the present invention is not limited by this limit. On the contrary, the embodiments of the present ...

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Abstract

The invention discloses a parallel-flash layer translating method, which comprises the following steps: establishing a mixed address mapping mechanism which makes a page group and a block as an unit, wherein the page group can be divided into a logic page group and a physical page group, the block can be divided into a logic block and a physical block; when the quantity of I / O requests sent by a file system is larger than a predetermined request threshold value, establishing an I / O request queue and putting the I / O requests which are beyond the predetermined request threshold value in the I / O request queue; dividing the I / O requests of the I / O request queue into a plurality of groups of I / O request sub-queues according to the mixed address mapping mechanism; and carrying out parallel reading-writing operation to each group of I / O request sub-queues, wherein each group of the I / O request sub-queues comprise a plurality of I / O requests and the plurality of I / O requests can operate parallelly. The method utilizes excellent parallel-flash feature completely through the parallel reading-writing operation; writing-in and erasing time is reduced; thus, complexity is reduced; and high performance is obtained. The invention also discloses a parallel-flash translation layer system.

Description

technical field [0001] The invention relates to the technical field of computer storage, in particular to a parallel flash conversion layer method and system. Background technique [0002] At present, NAND flash memory is widely used in mobile electronic products, such as mobile phones, MP3 / MP4 players, digital cameras, handheld computers, tablet computers, notebook computers, etc. Flash memory is often used to replace disk drives as a non-volatile secondary storage medium. Compared with disk, flash memory allows random access and has the advantages of low energy consumption, high throughput, small size, shock resistance and portability. The main reason why manufacturers and users of mobile electronic devices pay more and more attention to flash memory is that the capacity of NAND flash memory continues to increase, but its price continues to decrease. However, the long time consumed by NAND flash write and erase operations is the main performance bottleneck of the storage...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F3/06G06F12/02
Inventor 胡事民谈鉴锋白石廖学良
Owner TSINGHUA UNIV
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