LDPC (low density parity check) decoding device capable of reducing power consumption and implementation method of LDPC decoding device
The technology of a decoding device and implementation method, which is applied in the field of decoding devices, can solve the problems of hardware overhead LDPC code increase, large computing unit and storage unit, consumption, etc., and achieve the effect of reducing power consumption
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0038] Below in conjunction with each accompanying drawing, the content that the present invention proposes is described in detail: figure 1 is the circuit structure diagram of the decoding device, figure 2 A flowchart of the method for its implementation.
[0039] When the decoder is in the effective enabling state, it includes two states: the decoding state and the idle state. The decoder implements the decoding function of the LDPC code in the CMMB baseband chip. According to the decoding state and idle state, the decoder gives a dynamic voltage setting signal in real time.
[0040] The decoder initialization unit completes the work of information initialization in the LDPC decoding algorithm. The iterative decoding unit calculates the extrinsic information from the check node to the variable node and the extrinsic information from the variable node to the check node, calculates the posterior probability and decodes the decision. The decoding output unit is used to jud...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 