Configurable digital-analog phase locked loop

Abstract

A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop.

Description

technical field [0001] The present invention relates generally to phase locked loops, and more particularly to hybrid analog-digital phase locked loops. Background technique [0002] A phase locked loop (PLL) generates a signal relative to a reference signal. A phase locked loop circuit adjusts the frequency of the PLL output signal based on the phase and / or frequency difference between the reference signal and the PLL output signal. The frequency of the output signal is increased or decreased based on the difference. Therefore, a phase locked loop is a control system that uses negative feedback. Phase locked loops are used in electronic devices such as radios, telecommunications circuits, and computers, among other devices. [0003] PLLs often use a resonantly tuned voltage-controlled oscillator (VCO) to generate the PLL output signal. A resonant tuned VCO often includes a capacitive device and a resonant inductor-capacitor (LC) circuit. The capacitive device typically...

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Problems solved by technology

Unfortunately, these PLLs also have some disadvantages

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