Semiconductor memory system

Abstract

According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.

Description

[0001] Associate application [0002] This application enjoys the benefit of priority of Japanese Application Patent No. 2011-058140 filed on March 16, 2011, the entire contents of which are incorporated herein by reference. technical field [0003] Generally, the present embodiments relate to semiconductor memory systems. Background technique [0004] Conventionally, a semiconductor memory system in which a nonvolatile semiconductor memory element such as a NAND flash memory is mounted on a substrate on which a connector is formed has been used. Furthermore, in addition to the nonvolatile semiconductor memory element, the semiconductor memory system includes a volatile semiconductor memory element and a controller for controlling the nonvolatile semiconductor memory element and the volatile semiconductor memory element. [0005] In such a semiconductor memory system, the shape and size of the substrate may be restricted depending on the usage environment, specifications, e...

AI Technical Summary

Problems solved by technology

Non-volatile semiconductor storage elements are arranged along the long side direction on the surface layer side of the substrate

Images